Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
[karo-tx-uboot.git] / include / configs / sama5d3xek.h
1 /*
2  * Configuation settings for the SAMA5D3xEK board.
3  *
4  * Copyright (C) 2012 - 2013 Atmel
5  *
6  * based on at91sam9m10g45ek.h by:
7  * Stelian Pop <stelian@popies.net>
8  * Lead Tech Design <www.leadtechdesign.com>
9  *
10  * SPDX-License-Identifier:     GPL-2.0+
11  */
12
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #include <asm/hardware.h>
17
18 #define CONFIG_SYS_TEXT_BASE            0x26f00000
19
20 /* ARM asynchronous clock */
21 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
22 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
23 #define CONFIG_SYS_HZ                   1000
24
25 #define CONFIG_AT91FAMILY
26 #define CONFIG_ARCH_CPU_INIT
27
28 #define CONFIG_SKIP_LOWLEVEL_INIT
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_DISPLAY_CPUINFO
31
32 #define CONFIG_CMD_BOOTZ
33 #define CONFIG_OF_LIBFDT                /* Device Tree support */
34
35 /* general purpose I/O */
36 #define CONFIG_AT91_GPIO
37
38 /* serial console */
39 #define CONFIG_ATMEL_USART
40 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
41 #define CONFIG_USART_ID                 ATMEL_ID_DBGU
42
43 /*
44  * This needs to be defined for the OHCI code to work but it is defined as
45  * ATMEL_ID_UHPHS in the CPU specific header files.
46  */
47 #define ATMEL_ID_UHP                    ATMEL_ID_UHPHS
48
49 /*
50  * Specify the clock enable bit in the PMC_SCER register.
51  */
52 #define ATMEL_PMC_UHP                   AT91SAM926x_PMC_UHP
53
54 /* LCD */
55 #define CONFIG_LCD
56 #define LCD_BPP                         LCD_COLOR16
57 #define LCD_OUTPUT_BPP                  24
58 #define CONFIG_LCD_LOGO
59 #undef LCD_TEST_PATTERN
60 #define CONFIG_LCD_INFO
61 #define CONFIG_LCD_INFO_BELOW_LOGO
62 #define CONFIG_SYS_WHITE_ON_BLACK
63 #define CONFIG_ATMEL_HLCD
64 #define CONFIG_ATMEL_LCD_RGB565
65 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
66
67 /* board specific (not enough SRAM) */
68 #define CONFIG_SAMA5D3_LCD_BASE         0x23E00000
69
70 #define CONFIG_BOOTDELAY                3
71
72 /*
73  * BOOTP options
74  */
75 #define CONFIG_BOOTP_BOOTFILESIZE
76 #define CONFIG_BOOTP_BOOTPATH
77 #define CONFIG_BOOTP_GATEWAY
78 #define CONFIG_BOOTP_HOSTNAME
79
80 /* No NOR flash */
81 #define CONFIG_SYS_NO_FLASH
82
83 /*
84  * Command line configuration.
85  */
86 #include <config_cmd_default.h>
87 #undef CONFIG_CMD_FPGA
88 #undef CONFIG_CMD_IMI
89 #undef CONFIG_CMD_LOADS
90 #define CONFIG_CMD_PING
91 #define CONFIG_CMD_DHCP
92
93 /* SDRAM */
94 #define CONFIG_NR_DRAM_BANKS            1
95 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
96 #define CONFIG_SYS_SDRAM_SIZE           0x20000000
97
98 #define CONFIG_SYS_INIT_SP_ADDR \
99         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
100
101 /* SerialFlash */
102 #define CONFIG_CMD_SF
103
104 #ifdef CONFIG_CMD_SF
105 #define CONFIG_ATMEL_SPI
106 #define CONFIG_SPI_FLASH
107 #define CONFIG_SPI_FLASH_ATMEL
108 #define CONFIG_SF_DEFAULT_SPEED         30000000
109 #endif
110
111 /* NAND flash */
112 #define CONFIG_CMD_NAND
113
114 #ifdef CONFIG_CMD_NAND
115 #define CONFIG_NAND_MAX_CHIPS           1
116 #define CONFIG_NAND_ATMEL
117 #define CONFIG_SYS_MAX_NAND_DEVICE      1
118 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
119 /* our ALE is AD21 */
120 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
121 /* our CLE is AD22 */
122 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
123 #define CONFIG_SYS_NAND_ONFI_DETECTION
124 /* PMECC & PMERRLOC */
125 #define CONFIG_ATMEL_NAND_HWECC
126 #define CONFIG_ATMEL_NAND_HW_PMECC
127 #define CONFIG_PMECC_CAP                4
128 #define CONFIG_PMECC_SECTOR_SIZE        512
129 #define CONFIG_PMECC_INDEX_TABLE_OFFSET ATMEL_PMECC_INDEX_OFFSET_512
130 #define CONFIG_CMD_NAND_TRIMFFS
131 #endif
132
133 /* Ethernet Hardware */
134 #define CONFIG_MACB
135 #define CONFIG_RMII
136 #define CONFIG_NET_MULTI
137 #define CONFIG_NET_RETRY_COUNT          20
138 #define CONFIG_MACB_SEARCH_PHY
139
140 /* MMC */
141 #define CONFIG_CMD_MMC
142
143 #ifdef CONFIG_CMD_MMC
144 #define CONFIG_MMC
145 #define CONFIG_GENERIC_MMC
146 #define CONFIG_GENERIC_ATMEL_MCI
147 #define ATMEL_BASE_MMCI                 ATMEL_BASE_MCI0
148 #endif
149
150 /* USB */
151 #define CONFIG_CMD_USB
152
153 #ifdef CONFIG_CMD_USB
154 #define CONFIG_USB_ATMEL
155 #define CONFIG_USB_OHCI_NEW
156 #define CONFIG_SYS_USB_OHCI_CPU_INIT
157 #define CONFIG_SYS_USB_OHCI_REGS_BASE           ATMEL_BASE_OHCI
158 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "sama5d3"
159 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
160 #define CONFIG_DOS_PARTITION
161 #define CONFIG_USB_STORAGE
162 #endif
163
164 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
165 #define CONFIG_CMD_FAT
166 #endif
167
168 #define CONFIG_SYS_LOAD_ADDR                    0x22000000 /* load address */
169
170 #ifdef CONFIG_SYS_USE_SERIALFLASH
171 /* bootstrap + u-boot + env + linux in serial flash */
172 #define CONFIG_ENV_IS_IN_SPI_FLASH
173 #define CONFIG_ENV_OFFSET       0x5000
174 #define CONFIG_ENV_SIZE         0x3000
175 #define CONFIG_ENV_SECT_SIZE    0x1000
176 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
177                                 "sf read 0x22000000 0x42000 0x300000; " \
178                                 "bootm 0x22000000"
179 #elif CONFIG_SYS_USE_NANDFLASH
180 /* bootstrap + u-boot + env in nandflash */
181 #define CONFIG_ENV_IS_IN_NAND
182 #define CONFIG_ENV_OFFSET               0xc0000
183 #define CONFIG_ENV_OFFSET_REDUND        0x100000
184 #define CONFIG_ENV_SIZE                 0x20000
185 #define CONFIG_BOOTCOMMAND      "nand read 0x21000000 0x180000 0x80000;" \
186                                 "nand read 0x22000000 0x200000 0x600000;" \
187                                 "bootm 0x22000000 - 0x21000000"
188 #elif CONFIG_SYS_USE_MMC
189 /* bootstrap + u-boot + env in sd card */
190 #define CONFIG_ENV_IS_IN_MMC
191 #define CONFIG_ENV_OFFSET       0x2000
192 #define CONFIG_ENV_SIZE         0x1000
193 #define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x21000000 dtb; " \
194                                 "fatload mmc 0:1 0x22000000 uImage; " \
195                                 "bootm 0x22000000 - 0x21000000"
196 #define CONFIG_SYS_MMC_ENV_DEV  0
197 #else
198 #define CONIG_ENV_IS_NOWHERE
199 #endif
200
201 #ifdef CONFIG_SYS_USE_MMC
202 #define CONFIG_BOOTARGS                                                 \
203         "console=ttyS0,115200 earlyprintk "                             \
204         "root=/dev/mmcblk0p2 rw rootwait"
205 #else
206 #define CONFIG_BOOTARGS                                                 \
207         "console=ttyS0,115200 earlyprintk "                             \
208         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
209         "256K(env),256k(evn_redundent),256k(spare),"                    \
210         "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
211         "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
212 #endif
213
214 #define CONFIG_BAUDRATE                 115200
215
216 #define CONFIG_SYS_PROMPT               "U-Boot> "
217 #define CONFIG_SYS_CBSIZE               256
218 #define CONFIG_SYS_MAXARGS              16
219 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
220                                         sizeof(CONFIG_SYS_PROMPT) + 16)
221 #define CONFIG_SYS_LONGHELP
222 #define CONFIG_CMDLINE_EDITING
223 #define CONFIG_AUTO_COMPLETE
224 #define CONFIG_SYS_HUSH_PARSER
225
226 /* Size of malloc() pool */
227 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)
228
229 #endif