aab1bf1902b40f8382ca78d6fd47da324e5d6408
[karo-tx-uboot.git] / include / configs / tricorder.h
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * (C) Copyright 2012
8  * Corscience GmbH & Co. KG
9  * Thomas Weber <weber@corscience.de>
10  *
11  * Configuration settings for the Tricorder board.
12  *
13  * SPDX-License-Identifier:     GPL-2.0+
14  */
15
16 #ifndef __CONFIG_H
17 #define __CONFIG_H
18
19 /* High Level Configuration Options */
20 #define CONFIG_OMAP                     /* in a TI OMAP core */
21 #define CONFIG_OMAP34XX                 /* which is a 34XX */
22 #define CONFIG_OMAP_COMMON
23
24 #define CONFIG_MACH_TYPE                MACH_TYPE_TRICORDER
25 /*
26  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
27  * 64 bytes before this address should be set aside for u-boot.img's
28  * header. That is 0x800FFFC0--0x80100000 should not be used for any
29  * other needs.
30  */
31 #define CONFIG_SYS_TEXT_BASE            0x80100000
32
33 #define CONFIG_SDRC                     /* The chip has SDRC controller */
34
35 #include <asm/arch/cpu.h>               /* get chip and board defs */
36 #include <asm/arch/omap3.h>
37
38 /* Display CPU and Board information */
39 #define CONFIG_DISPLAY_CPUINFO
40 #define CONFIG_DISPLAY_BOARDINFO
41
42 #define CONFIG_SILENT_CONSOLE
43 #define CONFIG_ZERO_BOOTDELAY_CHECK
44
45 /* Clock Defines */
46 #define V_OSCK                          26000000 /* Clock output from T2 */
47 #define V_SCLK                          (V_OSCK >> 1)
48
49 #define CONFIG_MISC_INIT_R
50
51 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
52 #define CONFIG_SETUP_MEMORY_TAGS
53 #define CONFIG_INITRD_TAG
54 #define CONFIG_REVISION_TAG
55
56 #define CONFIG_OF_LIBFDT
57
58 /* Size of malloc() pool */
59 #define CONFIG_SYS_MALLOC_LEN           (1024*1024)
60
61 /* Hardware drivers */
62
63 /* GPIO support */
64 #define CONFIG_OMAP_GPIO
65
66 /* LED support */
67 #define CONFIG_STATUS_LED
68 #define CONFIG_BOARD_SPECIFIC_LED
69 #define CONFIG_CMD_LED                  /* LED command */
70 #define STATUS_LED_BIT                  (1 << 0)
71 #define STATUS_LED_STATE                STATUS_LED_ON
72 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
73 #define STATUS_LED_BIT1                 (1 << 1)
74 #define STATUS_LED_STATE1               STATUS_LED_ON
75 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
76 #define STATUS_LED_BIT2                 (1 << 2)
77 #define STATUS_LED_STATE2               STATUS_LED_ON
78 #define STATUS_LED_PERIOD2              (CONFIG_SYS_HZ / 2)
79
80 /* NS16550 Configuration */
81 #define CONFIG_SYS_NS16550
82 #define CONFIG_SYS_NS16550_SERIAL
83 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
84 #define CONFIG_SYS_NS16550_CLK          48000000 /* 48MHz (APLL96/2) */
85
86 /* select serial console configuration */
87 #define CONFIG_CONS_INDEX               3
88 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
89 #define CONFIG_SERIAL3                  3
90 #define CONFIG_BAUDRATE                 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
92                                         115200}
93
94 /* MMC */
95 #define CONFIG_GENERIC_MMC
96 #define CONFIG_MMC
97 #define CONFIG_OMAP_HSMMC
98 #define CONFIG_DOS_PARTITION
99
100 /* I2C */
101 #define CONFIG_HARD_I2C
102 #define CONFIG_SYS_I2C_SPEED            100000
103 #define CONFIG_SYS_I2C_SLAVE            1
104 #define CONFIG_DRIVER_OMAP34XX_I2C      1
105 #define CONFIG_I2C_MULTI_BUS
106
107 /* EEPROM */
108 #define CONFIG_SYS_I2C_MULTI_EEPROMS
109 #define CONFIG_CMD_EEPROM
110 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
111 #define CONFIG_SYS_EEPROM_BUS_NUM       1
112
113 /* TWL4030 */
114 #define CONFIG_TWL4030_POWER
115 #define CONFIG_TWL4030_LED
116
117 /* Board NAND Info */
118 #define CONFIG_SYS_NO_FLASH             /* no NOR flash */
119 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
120 #define MTDIDS_DEFAULT                  "nand0=omap2-nand.0"
121 #define MTDPARTS_DEFAULT                "mtdparts=omap2-nand.0:" \
122                                                 "128k(SPL)," \
123                                                 "1m(u-boot)," \
124                                                 "384k(u-boot-env1)," \
125                                                 "1152k(mtdoops)," \
126                                                 "384k(u-boot-env2)," \
127                                                 "5m(kernel)," \
128                                                 "2m(fdt)," \
129                                                 "-(ubi)"
130
131 #define CONFIG_NAND_OMAP_GPMC
132 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
133                                                         /* to access nand */
134 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
135                                                         /* to access nand at */
136                                                         /* CS0 */
137 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
138
139 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
140                                                         /* devices */
141 #define CONFIG_NAND_OMAP_BCH8
142 #define CONFIG_BCH
143
144 /* commands to include */
145 #include <config_cmd_default.h>
146
147 #define CONFIG_CMD_EXT2                 /* EXT2 Support */
148 #define CONFIG_CMD_FAT                  /* FAT support */
149 #define CONFIG_CMD_I2C                  /* I2C serial bus support */
150 #define CONFIG_CMD_MMC                  /* MMC support */
151 #define CONFIG_CMD_MTDPARTS             /* Enable MTD parts commands */
152 #define CONFIG_CMD_NAND                 /* NAND support */
153 #define CONFIG_CMD_NAND_LOCK_UNLOCK     /* nand (un)lock commands */
154 #define CONFIG_CMD_UBI                  /* UBI commands */
155 #define CONFIG_CMD_UBIFS                /* UBIFS commands */
156 #define CONFIG_LZO                      /* LZO is needed for UBIFS */
157
158 #undef CONFIG_CMD_NET
159 #undef CONFIG_CMD_NFS
160 #undef CONFIG_CMD_FPGA                  /* FPGA configuration Support */
161 #undef CONFIG_CMD_IMI                   /* iminfo */
162 #undef CONFIG_CMD_JFFS2                 /* JFFS2 Support */
163
164 /* needed for ubi */
165 #define CONFIG_RBTREE
166 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
167 #define CONFIG_MTD_PARTITIONS
168
169 /* Environment information (this is the common part) */
170
171 #define CONFIG_BOOTDELAY                0
172
173 /* hang() the board on panic() */
174 #define CONFIG_PANIC_HANG
175
176 /* environment placement (for NAND), is different for FLASHCARD but does not
177  * harm there */
178 #define CONFIG_ENV_OFFSET               0x120000    /* env start */
179 #define CONFIG_ENV_OFFSET_REDUND        0x2A0000    /* redundant env start */
180 #define CONFIG_ENV_SIZE                 (16 << 10)  /* use 16KiB for env */
181 #define CONFIG_ENV_RANGE                (384 << 10) /* allow badblocks in env */
182
183 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
184  * value can not be used here! */
185 #define CONFIG_LOADADDR         0x82000000
186
187 #define CONFIG_COMMON_ENV_SETTINGS \
188         "console=ttyO2,115200n8\0" \
189         "mmcdev=0\0" \
190         "vram=3M\0" \
191         "defaultdisplay=lcd\0" \
192         "kernelopts=mtdoops.mtddev=3\0" \
193         "mtdparts=" MTDPARTS_DEFAULT "\0" \
194         "mtdids=" MTDIDS_DEFAULT "\0" \
195         "commonargs=" \
196                 "setenv bootargs console=${console} " \
197                 "${mtdparts} " \
198                 "${kernelopts} " \
199                 "vt.global_cursor_default=0 " \
200                 "vram=${vram} " \
201                 "omapdss.def_disp=${defaultdisplay}\0"
202
203 #define CONFIG_BOOTCOMMAND "run autoboot"
204
205 /* specific environment settings for different use cases
206  * FLASHCARD: used to run a rdimage from sdcard to program the device
207  * 'NORMAL': used to boot kernel from sdcard, nand, ...
208  *
209  * The main aim for the FLASHCARD skin is to have an embedded environment
210  * which will not be influenced by any data already on the device.
211  */
212 #ifdef CONFIG_FLASHCARD
213
214 #define CONFIG_ENV_IS_NOWHERE
215
216 /* the rdaddr is 16 MiB before the loadaddr */
217 #define CONFIG_ENV_RDADDR       "rdaddr=0x81000000\0"
218
219 #define CONFIG_EXTRA_ENV_SETTINGS \
220         CONFIG_COMMON_ENV_SETTINGS \
221         CONFIG_ENV_RDADDR \
222         "autoboot=" \
223         "run commonargs; " \
224         "setenv bootargs ${bootargs} " \
225                 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
226                 "rdinit=/sbin/init; " \
227         "mmc dev ${mmcdev}; mmc rescan; " \
228         "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
229         "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
230         "bootm ${loadaddr} ${rdaddr}\0"
231
232 #else /* CONFIG_FLASHCARD */
233
234 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
235
236 #define CONFIG_ENV_IS_IN_NAND
237
238 #define CONFIG_EXTRA_ENV_SETTINGS \
239         CONFIG_COMMON_ENV_SETTINGS \
240         "mmcargs=" \
241                 "run commonargs; " \
242                 "setenv bootargs ${bootargs} " \
243                 "root=/dev/mmcblk0p2 " \
244                 "rootwait " \
245                 "rw\0" \
246         "nandargs=" \
247                 "run commonargs; " \
248                 "setenv bootargs ${bootargs} " \
249                 "root=ubi0:root " \
250                 "ubi.mtd=7 " \
251                 "rootfstype=ubifs " \
252                 "ro\0" \
253         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
254         "bootscript=echo Running bootscript from mmc ...; " \
255                 "source ${loadaddr}\0" \
256         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
257         "mmcboot=echo Booting from mmc ...; " \
258                 "run mmcargs; " \
259                 "bootm ${loadaddr}\0" \
260         "loaduimage_ubi=ubi part ubi; " \
261                 "ubifsmount ubi:root; " \
262                 "ubifsload ${loadaddr} /boot/uImage\0" \
263         "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
264         "nandboot=echo Booting from nand ...; " \
265                 "run nandargs; " \
266                 "run loaduimage_nand; " \
267                 "bootm ${loadaddr}\0" \
268         "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
269                         "if run loadbootscript; then " \
270                                 "run bootscript; " \
271                         "else " \
272                                 "if run loaduimage; then " \
273                                         "run mmcboot; " \
274                                 "else run nandboot; " \
275                                 "fi; " \
276                         "fi; " \
277                 "else run nandboot; fi\0"
278
279 #endif /* CONFIG_FLASHCARD */
280
281 /* Miscellaneous configurable options */
282 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
283 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
284 #define CONFIG_CMDLINE_EDITING          /* enable cmdline history */
285 #define CONFIG_AUTO_COMPLETE
286 #define CONFIG_SYS_PROMPT               "OMAP3 Tricorder # "
287 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
288 /* Print Buffer Size */
289 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
290                                         sizeof(CONFIG_SYS_PROMPT) + 16)
291 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
292
293 /* Boot Argument Buffer Size */
294 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
295
296 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x00000000)
297 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
298                                         0x07000000) /* 112 MB */
299
300 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
301
302 /*
303  * OMAP3 has 12 GP timers, they can be driven by the system clock
304  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
305  * This rate is divided by a local divisor.
306  */
307 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
308 #define CONFIG_SYS_PTV                  2 /* Divisor: 2^(PTV+1) => 8 */
309 #define CONFIG_SYS_HZ                   1000
310
311 /*  Physical Memory Map  */
312 #define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
313 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
314 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
315
316 /* NAND and environment organization  */
317 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
318
319 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
320
321 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
322 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
323 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
324 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
325                                                 CONFIG_SYS_INIT_RAM_SIZE - \
326                                                 GENERATED_GBL_DATA_SIZE)
327
328 /* SRAM config */
329 #define CONFIG_SYS_SRAM_START           0x40200000
330 #define CONFIG_SYS_SRAM_SIZE            0x10000
331
332 /* Defines for SPL */
333 #define CONFIG_SPL
334 #define CONFIG_SPL_FRAMEWORK
335 #define CONFIG_SPL_NAND_SIMPLE
336
337 #define CONFIG_SPL_BOARD_INIT
338 #define CONFIG_SPL_GPIO_SUPPORT
339 #define CONFIG_SPL_LIBCOMMON_SUPPORT
340 #define CONFIG_SPL_LIBDISK_SUPPORT
341 #define CONFIG_SPL_I2C_SUPPORT
342 #define CONFIG_SPL_LIBGENERIC_SUPPORT
343 #define CONFIG_SPL_SERIAL_SUPPORT
344 #define CONFIG_SPL_POWER_SUPPORT
345 #define CONFIG_SPL_NAND_SUPPORT
346 #define CONFIG_SPL_NAND_BASE
347 #define CONFIG_SPL_NAND_DRIVERS
348 #define CONFIG_SPL_NAND_ECC
349 #define CONFIG_SPL_MMC_SUPPORT
350 #define CONFIG_SPL_FAT_SUPPORT
351 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
352 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
353 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
354 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
355
356 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
357 #define CONFIG_SPL_MAX_SIZE             (55 * 1024)     /* 7 KB for stack */
358 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
359
360 #define CONFIG_SPL_BSS_START_ADDR       0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
361 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
362
363 /* NAND boot config */
364 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
365 #define CONFIG_SYS_NAND_PAGE_COUNT      64
366 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
367 #define CONFIG_SYS_NAND_OOBSIZE         64
368 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
369 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
370 #define CONFIG_SYS_NAND_ECCPOS          {12, 13, 14, 15, 16, 17, 18, 19, 20,\
371                         21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\
372                         34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\
373                         47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\
374                         60, 61, 62, 63}
375
376 #define CONFIG_SYS_NAND_ECCSIZE         512
377 #define CONFIG_SYS_NAND_ECCBYTES        13
378
379 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
380
381 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
382 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x100000
383
384 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
385 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
386
387 #define CONFIG_SYS_ALT_MEMTEST
388 #define CONFIG_SYS_MEMTEST_SCRATCH      0x81000000
389 #endif /* __CONFIG_H */