ebd7a257f36a001e78f2c14968e6e51d3ec4a437
[karo-tx-uboot.git] / include / configs / tricorder.h
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * (C) Copyright 2012
8  * Corscience GmbH & Co. KG
9  * Thomas Weber <weber@corscience.de>
10  *
11  * Configuration settings for the Tricorder board.
12  *
13  * See file CREDITS for list of people who contributed to this
14  * project.
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License as
18  * published by the Free Software Foundation; either version 2 of
19  * the License, or (at your option) any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software
28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29  * MA 02111-1307 USA
30  */
31
32 #ifndef __CONFIG_H
33 #define __CONFIG_H
34
35 /* High Level Configuration Options */
36 #define CONFIG_OMAP                     /* in a TI OMAP core */
37 #define CONFIG_OMAP34XX                 /* which is a 34XX */
38
39 #define CONFIG_MACH_TYPE                MACH_TYPE_TRICORDER
40 /*
41  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
42  * 64 bytes before this address should be set aside for u-boot.img's
43  * header. That is 0x800FFFC0--0x80100000 should not be used for any
44  * other needs.
45  */
46 #define CONFIG_SYS_TEXT_BASE            0x80100000
47
48 #define CONFIG_SDRC                     /* The chip has SDRC controller */
49
50 #include <asm/arch/cpu.h>               /* get chip and board defs */
51 #include <asm/arch/omap3.h>
52
53 /* Display CPU and Board information */
54 #define CONFIG_DISPLAY_CPUINFO
55 #define CONFIG_DISPLAY_BOARDINFO
56
57 /* Clock Defines */
58 #define V_OSCK                          26000000 /* Clock output from T2 */
59 #define V_SCLK                          (V_OSCK >> 1)
60
61 #define CONFIG_MISC_INIT_R
62
63 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
64 #define CONFIG_SETUP_MEMORY_TAGS
65 #define CONFIG_INITRD_TAG
66 #define CONFIG_REVISION_TAG
67
68 #define CONFIG_OF_LIBFDT
69
70 /* Size of malloc() pool */
71 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
72                                                 /* Sector */
73 #define CONFIG_SYS_MALLOC_LEN           (1024*1024)
74
75 /* Hardware drivers */
76
77 /* NS16550 Configuration */
78 #define CONFIG_SYS_NS16550
79 #define CONFIG_SYS_NS16550_SERIAL
80 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
81 #define CONFIG_SYS_NS16550_CLK          48000000 /* 48MHz (APLL96/2) */
82
83 /* select serial console configuration */
84 #define CONFIG_CONS_INDEX               3
85 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
86 #define CONFIG_SERIAL3                  3
87 #define CONFIG_BAUDRATE                 115200
88 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
89                                         115200}
90
91 /* MMC */
92 #define CONFIG_GENERIC_MMC
93 #define CONFIG_MMC
94 #define CONFIG_OMAP_HSMMC
95 #define CONFIG_DOS_PARTITION
96
97 /* I2C */
98 #define CONFIG_HARD_I2C
99 #define CONFIG_SYS_I2C_SPEED            100000
100 #define CONFIG_SYS_I2C_SLAVE            1
101 #define CONFIG_DRIVER_OMAP34XX_I2C      1
102
103 /* TWL4030 */
104 #define CONFIG_TWL4030_POWER
105 #define CONFIG_TWL4030_LED
106
107 /* Board NAND Info */
108 #define CONFIG_SYS_NO_FLASH             /* no NOR flash */
109 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
110 #define MTDIDS_DEFAULT                  "nand0=nand"
111 #define MTDPARTS_DEFAULT                "mtdparts=nand:" \
112                                                 "512k(u-boot-spl)," \
113                                                 "1920k(u-boot)," \
114                                                 "128k(u-boot-env)," \
115                                                 "4m(kernel)," \
116                                                 "-(fs)"
117
118 #define CONFIG_NAND_OMAP_GPMC
119 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
120                                                         /* to access nand */
121 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
122                                                         /* to access nand at */
123                                                         /* CS0 */
124 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
125
126 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
127                                                         /* devices */
128
129 /* commands to include */
130 #include <config_cmd_default.h>
131
132 #define CONFIG_CMD_EXT2                 /* EXT2 Support */
133 #define CONFIG_CMD_FAT                  /* FAT support */
134 #define CONFIG_CMD_I2C                  /* I2C serial bus support */
135 #define CONFIG_CMD_MMC                  /* MMC support */
136 #define CONFIG_CMD_MTDPARTS             /* Enable MTD parts commands */
137 #define CONFIG_CMD_NAND                 /* NAND support */
138 #define CONFIG_CMD_NAND_LOCK_UNLOCK     /* nand (un)lock commands */
139 #define CONFIG_CMD_UBI                  /* UBI commands */
140 #define CONFIG_CMD_UBIFS                /* UBIFS commands */
141 #define CONFIG_LZO                      /* LZO is needed for UBIFS */
142
143 #undef CONFIG_CMD_NET
144 #undef CONFIG_CMD_NFS
145 #undef CONFIG_CMD_FPGA                  /* FPGA configuration Support */
146 #undef CONFIG_CMD_IMI                   /* iminfo */
147 #undef CONFIG_CMD_JFFS2                 /* JFFS2 Support */
148
149 /* needed for ubi */
150 #define CONFIG_RBTREE
151 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
152 #define CONFIG_MTD_PARTITIONS
153
154 /* Environment information */
155 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
156
157 #define CONFIG_BOOTDELAY                3
158
159 #define CONFIG_EXTRA_ENV_SETTINGS \
160         "loadaddr=0x82000000\0" \
161         "console=ttyO2,115200n8\0" \
162         "mmcdev=0\0" \
163         "vram=12M\0" \
164         "lcdmode=800x600\0" \
165         "defaultdisplay=lcd\0" \
166         "kernelopts=rw rootwait\0" \
167         "commonargs=" \
168                 "setenv bootargs console=${console} " \
169                 "vram=${vram} " \
170                 "omapfb.mode=lcd:${lcdmode} " \
171                 "omapdss.def_disp=${defaultdisplay}\0" \
172         "mmcargs=" \
173                 "run commonargs; " \
174                 "setenv bootargs ${bootargs} " \
175                 "root=/dev/mmcblk0p2 " \
176                 "${kernelopts}\0" \
177         "nandargs=" \
178                 "run commonargs; " \
179                 "setenv bootargs ${bootargs} " \
180                 "omapfb.mode=lcd:${lcdmode} " \
181                 "omapdss.def_disp=${defaultdisplay} " \
182                 "root=ubi0:root " \
183                 "ubi.mtd=4 " \
184                 "rootfstype=ubifs " \
185                 "${kernelopts}\0" \
186         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
187         "bootscript=echo Running bootscript from mmc ...; " \
188                 "source ${loadaddr}\0" \
189         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
190         "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
191         "mmcboot=echo Booting from mmc ...; " \
192                 "run mmcargs; " \
193                 "bootm ${loadaddr}\0" \
194         "loaduimage_ubi=mtd default; " \
195                 "ubi part fs; " \
196                 "ubifsmount ubi:root; " \
197                 "ubifsload ${loadaddr} /boot/uImage\0" \
198         "nandboot=echo Booting from nand ...; " \
199                 "run nandargs; " \
200                 "run loaduimage_ubi; " \
201                 "bootm ${loadaddr}\0" \
202         "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
203                         "if run loadbootscript; then " \
204                                 "run bootscript; " \
205                         "else " \
206                                 "if run loaduimage; then " \
207                                         "run mmcboot; " \
208                                 "else run nandboot; " \
209                                 "fi; " \
210                         "fi; " \
211                 "else run nandboot; fi\0"
212
213
214 #define CONFIG_BOOTCOMMAND "run autoboot"
215
216 /* Miscellaneous configurable options */
217 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
218 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
219 #define CONFIG_AUTO_COMPLETE
220 #define CONFIG_SYS_PROMPT               "OMAP3 Tricorder # "
221 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
222 /* Print Buffer Size */
223 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
224                                         sizeof(CONFIG_SYS_PROMPT) + 16)
225 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
226
227 /* Boot Argument Buffer Size */
228 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
229
230 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x07000000)
231 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
232                                         0x01000000) /* 16MB */
233
234 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
235
236 /*
237  * OMAP3 has 12 GP timers, they can be driven by the system clock
238  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
239  * This rate is divided by a local divisor.
240  */
241 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
242 #define CONFIG_SYS_PTV                  2 /* Divisor: 2^(PTV+1) => 8 */
243 #define CONFIG_SYS_HZ                   1000
244
245 /*  Physical Memory Map  */
246 #define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
247 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
248 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
249
250 /* NAND and environment organization  */
251 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
252
253 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
254
255 #define CONFIG_ENV_IS_IN_NAND           1
256 #define CONFIG_ENV_OFFSET               0x260000 /* environment starts here */
257
258 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
259 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
260 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
261 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
262                                                 CONFIG_SYS_INIT_RAM_SIZE - \
263                                                 GENERATED_GBL_DATA_SIZE)
264
265 /* SRAM config */
266 #define CONFIG_SYS_SRAM_START           0x40200000
267 #define CONFIG_SYS_SRAM_SIZE            0x10000
268
269 /* Defines for SPL */
270 #define CONFIG_SPL
271 #define CONFIG_SPL_FRAMEWORK
272 #define CONFIG_SPL_NAND_SIMPLE
273
274 #define CONFIG_SPL_BOARD_INIT
275 #define CONFIG_SPL_LIBCOMMON_SUPPORT
276 #define CONFIG_SPL_LIBDISK_SUPPORT
277 #define CONFIG_SPL_I2C_SUPPORT
278 #define CONFIG_SPL_LIBGENERIC_SUPPORT
279 #define CONFIG_SPL_SERIAL_SUPPORT
280 #define CONFIG_SPL_POWER_SUPPORT
281 #define CONFIG_SPL_NAND_SUPPORT
282 #define CONFIG_SPL_NAND_BASE
283 #define CONFIG_SPL_NAND_DRIVERS
284 #define CONFIG_SPL_NAND_ECC
285 #define CONFIG_SPL_MMC_SUPPORT
286 #define CONFIG_SPL_FAT_SUPPORT
287 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
288 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
289 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
290 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
291
292 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
293 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
294 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
295
296 #define CONFIG_SPL_BSS_START_ADDR       0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
297 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
298
299 /* NAND boot config */
300 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
301 #define CONFIG_SYS_NAND_PAGE_COUNT      64
302 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
303 #define CONFIG_SYS_NAND_OOBSIZE         64
304 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
305 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
306 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
307                                                 10, 11, 12, 13}
308
309 #define CONFIG_SYS_NAND_ECCSIZE         512
310 #define CONFIG_SYS_NAND_ECCBYTES        3
311
312 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
313
314 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
315 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x200000
316
317 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
318 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
319
320 #endif /* __CONFIG_H */