include/configs/trizepsiv.h

   1 /*
   2  * (C) Copyright 2007
   3  * Stefano Babic, DENX Gmbh, sbabic@denx.de
   4  *
   5  * (C) Copyright 2004
   6  * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
   7  *
   8  * (C) Copyright 2002
   9  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  10  *
  11  * (C) Copyright 2002
  12  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  13  * Marius Groeger <mgroeger@sysgo.de>
  14  *
  15  * Configuation settings for the LUBBOCK board.
  16  *
  17  * See file CREDITS for list of people who contributed to this
  18  * project.
  19  *
  20  * This program is free software; you can redistribute it and/or
  21  * modify it under the terms of the GNU General Public License as
  22  * published by the Free Software Foundation; either version 2 of
  23  * the License, or (at your option) any later version.
  24  *
  25  * This program is distributed in the hope that it will be useful,
  26  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28  * GNU General Public License for more details.
  29  *
  30  * You should have received a copy of the GNU General Public License
  31  * along with this program; if not, write to the Free Software
  32  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33  * MA 02111-1307 USA
  34  */
  35
  36 #ifndef __CONFIG_H
  37 #define __CONFIG_H
  38
  39 /*
  40  * High Level Configuration Options
  41  * (easy to change)
  42  */
  43 #define CONFIG_PXA27X           1       /* This is an PXA27x CPU    */
  44
  45 #define CONFIG_MMC              1
  46 #define BOARD_LATE_INIT         1
  47 #define CONFIG_SYS_TEXT_BASE    0x0
  48
  49 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  50
  51 /* we will never enable dcache, because we have to setup MMU first */
  52 #define CONFIG_SYS_NO_DCACHE
  53
  54 #define RTC
  55
  56 /*
  57  * Size of malloc() pool
  58  */
  59 #define CONFIG_SYS_MALLOC_LEN       (CONFIG_ENV_SIZE + 128*1024)
  60 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
  61
  62 /*
  63  * Hardware drivers
  64  */
  65
  66 /*
  67  * select serial console configuration
  68  */
  69 #define CONFIG_PXA_SERIAL
  70 #define CONFIG_SERIAL_MULTI
  71 #define CONFIG_FFUART          1       /* we use FFUART on Conxs */
  72 #define CONFIG_BTUART          1       /* we use BTUART on Conxs */
  73 #define CONFIG_STUART          1       /* we use STUART on Conxs */
  74
  75 /* allow to overwrite serial and ethaddr */
  76 #define CONFIG_ENV_OVERWRITE
  77
  78 #define CONFIG_BAUDRATE        38400
  79
  80 #define CONFIG_DOS_PARTITION   1
  81
  82 /*
  83  * Command line configuration.
  84  */
  85 #include <config_cmd_default.h>
  86
  87 #define CONFIG_CMD_FAT
  88 #define CONFIG_CMD_IMLS
  89 #define CONFIG_CMD_PING
  90 #define CONFIG_CMD_USB
  91
  92 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  93
  94 #undef CONFIG_SHOW_BOOT_PROGRESS
  95
  96 #define CONFIG_BOOTDELAY        3
  97 #define CONFIG_SERVERIP         192.168.1.99
  98 #define CONFIG_BOOTCOMMAND      "run boot_flash"
  99 #define CONFIG_BOOTARGS         "console=ttyS0,38400 ramdisk_size=12288"\
 100                                 " rw root=/dev/ram initrd=0xa0800000,5m"
 101
 102 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 103         "program_boot_mmc="                                             \
 104                         "mw.b 0xa0010000 0xff 0x20000; "                \
 105                         "if      mmcinit && "                           \
 106                                 "fatload mmc 0 0xa0010000 u-boot.bin; " \
 107                         "then "                                         \
 108                                 "protect off 0x0 0x1ffff; "             \
 109                                 "erase 0x0 0x1ffff; "                   \
 110                                 "cp.b 0xa0010000 0x0 0x20000; "         \
 111                         "fi\0"                                          \
 112         "program_uzImage_mmc="                                          \
 113                         "mw.b 0xa0010000 0xff 0x180000; "               \
 114                         "if      mmcinit && "                           \
 115                                 "fatload mmc 0 0xa0010000 uzImage; "    \
 116                         "then "                                         \
 117                                 "protect off 0x40000 0x1bffff; "        \
 118                                 "erase 0x40000 0x1bffff; "              \
 119                                 "cp.b 0xa0010000 0x40000 0x180000; "    \
 120                         "fi\0"                                          \
 121         "program_ramdisk_mmc="                                          \
 122                         "mw.b 0xa0010000 0xff 0x500000; "               \
 123                         "if      mmcinit && "                           \
 124                                 "fatload mmc 0 0xa0010000 ramdisk.gz; " \
 125                         "then "                                         \
 126                                 "protect off 0x1c0000 0x6bffff; "       \
 127                                 "erase 0x1c0000 0x6bffff; "             \
 128                                 "cp.b 0xa0010000 0x1c0000 0x500000; "   \
 129                         "fi\0"                                          \
 130         "boot_mmc="                                                     \
 131                         "if      mmcinit && "                           \
 132                                 "fatload mmc 0 0xa0030000 uzImage && "  \
 133                                 "fatload mmc 0 0xa0800000 ramdisk.gz; " \
 134                         "then "                                         \
 135                                 "bootm 0xa0030000; "                    \
 136                         "fi\0"                                          \
 137         "boot_flash="                                                   \
 138                         "cp.b 0x1c0000 0xa0800000 0x500000; "           \
 139                         "bootm 0x40000\0"                               \
 140
 141 #define CONFIG_SETUP_MEMORY_TAGS 1
 142 #define CONFIG_CMDLINE_TAG       1      /* enable passing of ATAGs      */
 143 /* #define CONFIG_INITRD_TAG     1 */
 144
 145 #if defined(CONFIG_CMD_KGDB)
 146 #define CONFIG_KGDB_BAUDRATE    230400          /* speed to run kgdb serial port */
 147 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
 148 #endif
 149
 150 /*
 151  * Miscellaneous configurable options
 152  */
 153 #define CONFIG_SYS_HUSH_PARSER          1
 154 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 155
 156 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
 157 #ifdef CONFIG_SYS_HUSH_PARSER
 158 #define CONFIG_SYS_PROMPT               "$ "            /* Monitor Command Prompt */
 159 #else
 160 #define CONFIG_SYS_PROMPT               "=> "           /* Monitor Command Prompt */
 161 #endif
 162 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
 163 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 164 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 165 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 166 #define CONFIG_SYS_DEVICE_NULLDEV       1
 167
 168 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on     */
 169 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM   */
 170
 171 #define CONFIG_SYS_LOAD_ADDR            0xa1000000      /* default load address */
 172
 173 #define CONFIG_SYS_HZ                   1000
 174 #define CONFIG_SYS_CPUSPEED             0x207           /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
 175
 176                                                 /* valid baudrates */
 177 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 178
 179 #ifdef CONFIG_MMC
 180 #define CONFIG_PXA_MMC
 181 #define CONFIG_CMD_MMC
 182 #define CONFIG_SYS_MMC_BASE             0xF0000000
 183 #endif
 184
 185 /*
 186  * Stack sizes
 187  *
 188  * The stack sizes are set up in start.S using the settings below
 189  */
 190 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 191 #ifdef CONFIG_USE_IRQ
 192 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 193 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 194 #endif
 195
 196 /*
 197  * Physical Memory Map
 198  */
 199 #define CONFIG_NR_DRAM_BANKS    4          /* we have 2 banks of DRAM */
 200 #define PHYS_SDRAM_1            0xa0000000 /* SDRAM Bank #1 */
 201 #define PHYS_SDRAM_1_SIZE       0x04000000 /* 64 MB */
 202 #define PHYS_SDRAM_2            0xa4000000 /* SDRAM Bank #2 */
 203 #define PHYS_SDRAM_2_SIZE       0x00000000 /* 0 MB */
 204 #define PHYS_SDRAM_3            0xa8000000 /* SDRAM Bank #3 */
 205 #define PHYS_SDRAM_3_SIZE       0x00000000 /* 0 MB */
 206 #define PHYS_SDRAM_4            0xac000000 /* SDRAM Bank #4 */
 207 #define PHYS_SDRAM_4_SIZE       0x00000000 /* 0 MB */
 208
 209 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
 210
 211 #define CONFIG_SYS_DRAM_BASE            0xa0000000
 212 #define CONFIG_SYS_DRAM_SIZE            0x04000000
 213
 214 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 215
 216 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 217 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
 218
 219 /*
 220  * GPIO settings
 221  */
 222 #define CONFIG_SYS_GPSR0_VAL            0x00018000
 223 #define CONFIG_SYS_GPSR1_VAL            0x00000000
 224 #define CONFIG_SYS_GPSR2_VAL            0x400dc000
 225 #define CONFIG_SYS_GPSR3_VAL            0x00000000
 226 #define CONFIG_SYS_GPCR0_VAL            0x00000000
 227 #define CONFIG_SYS_GPCR1_VAL            0x00000000
 228 #define CONFIG_SYS_GPCR2_VAL            0x00000000
 229 #define CONFIG_SYS_GPCR3_VAL            0x00000000
 230 #define CONFIG_SYS_GPDR0_VAL            0x00018000
 231 #define CONFIG_SYS_GPDR1_VAL            0x00028801
 232 #define CONFIG_SYS_GPDR2_VAL            0x520dc000
 233 #define CONFIG_SYS_GPDR3_VAL            0x0001E000
 234 #define CONFIG_SYS_GAFR0_L_VAL          0x801c0000
 235 #define CONFIG_SYS_GAFR0_U_VAL          0x00000013
 236 #define CONFIG_SYS_GAFR1_L_VAL          0x6990100A
 237 #define CONFIG_SYS_GAFR1_U_VAL          0x00000008
 238 #define CONFIG_SYS_GAFR2_L_VAL          0xA0000000
 239 #define CONFIG_SYS_GAFR2_U_VAL          0x010900F2
 240 #define CONFIG_SYS_GAFR3_L_VAL          0x54000003
 241 #define CONFIG_SYS_GAFR3_U_VAL          0x00002401
 242 #define CONFIG_SYS_GRER0_VAL            0x00000000
 243 #define CONFIG_SYS_GRER1_VAL            0x00000000
 244 #define CONFIG_SYS_GRER2_VAL            0x00000000
 245 #define CONFIG_SYS_GRER3_VAL            0x00000000
 246
 247 #define CONFIG_SYS_GFER1_VAL            0x00000000
 248 #define CONFIG_SYS_GFER3_VAL            0x00000020
 249
 250 #if CONFIG_POLARIS
 251 #define CONFIG_SYS_GFER0_VAL            0x00000001
 252 #define CONFIG_SYS_GFER2_VAL            0x00200000
 253 #else
 254 #define CONFIG_SYS_GFER0_VAL            0x00000000
 255 #define CONFIG_SYS_GFER2_VAL            0x00000000
 256 #endif
 257
 258 #define CONFIG_SYS_PSSR_VAL             0x20    /* CHECK */
 259
 260 /*
 261  * Clock settings
 262  */
 263 #define CONFIG_SYS_CKEN         0x01FFFFFF      /* CHECK */
 264 #define CONFIG_SYS_CCCR         0x02000290 /*   520Mhz */
 265
 266 /*
 267  * Memory settings
 268  */
 269
 270 #define CONFIG_SYS_MSC0_VAL             0x4df84df0
 271 #define CONFIG_SYS_MSC1_VAL             0x7ff87ff4
 272 #if CONFIG_POLARIS
 273 #define CONFIG_SYS_MSC2_VAL             0xa2697ff8
 274 #else
 275 #define CONFIG_SYS_MSC2_VAL             0xa26936d4
 276 #endif
 277 #define CONFIG_SYS_MDCNFG_VAL           0x880009C9
 278 #define CONFIG_SYS_MDREFR_VAL           0x20ca201e
 279 #define CONFIG_SYS_MDMRS_VAL            0x00220022
 280
 281 #define CONFIG_SYS_FLYCNFG_VAL          0x00000000
 282 #define CONFIG_SYS_SXCNFG_VAL           0x40044004
 283
 284 /*
 285  * PCMCIA and CF Interfaces
 286  */
 287 #define CONFIG_SYS_MECR_VAL             0x00000001
 288 #define CONFIG_SYS_MCMEM0_VAL           0x00004204
 289 #define CONFIG_SYS_MCMEM1_VAL           0x00010204
 290 #define CONFIG_SYS_MCATT0_VAL           0x00010504
 291 #define CONFIG_SYS_MCATT1_VAL           0x00010504
 292 #define CONFIG_SYS_MCIO0_VAL            0x00008407
 293 #define CONFIG_SYS_MCIO1_VAL            0x0000c108
 294
 295 #define CONFIG_NET_MULTI                1
 296 #define CONFIG_DRIVER_DM9000            1
 297
 298 #if CONFIG_POLARIS
 299 #define CONFIG_DM9000_BASE              0x0C800000
 300 #else
 301 #define CONFIG_DM9000_BASE              0x08000000
 302 #endif
 303
 304 #define DM9000_IO                       CONFIG_DM9000_BASE
 305 #define DM9000_DATA                     (CONFIG_DM9000_BASE+0x8004)
 306
 307 #define CONFIG_USB_OHCI_NEW     1
 308 #define CONFIG_SYS_USB_OHCI_BOARD_INIT  1
 309 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
 310 #define CONFIG_SYS_USB_OHCI_REGS_BASE   0x4C000000
 311 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "trizepsiv"
 312 #define CONFIG_USB_STORAGE      1
 313 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
 314
 315 /*
 316  * FLASH and environment organization
 317  */
 318
 319 #define CONFIG_SYS_FLASH_CFI
 320 #define CONFIG_FLASH_CFI_DRIVER 1
 321
 322 #define CONFIG_SYS_MONITOR_BASE 0
 323 #define CONFIG_SYS_MONITOR_LEN          0x40000
 324
 325 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 326 #define CONFIG_SYS_MAX_FLASH_SECT       4 + 255  /* max number of sectors on one chip   */
 327
 328 /* timeout values are in ticks */
 329 #define CONFIG_SYS_FLASH_ERASE_TOUT     (25*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 330 #define CONFIG_SYS_FLASH_WRITE_TOUT     (25*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 331
 332 /* write flash less slowly */
 333 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
 334
 335 /* Unlock to be used with Intel chips */
 336 #define CONFIG_SYS_FLASH_PROTECTION     1
 337
 338 /* Flash environment locations */
 339 #define CONFIG_ENV_IS_IN_FLASH  1
 340 #define CONFIG_ENV_ADDR         (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) /* Addr of Environment Sector   */
 341 #define CONFIG_ENV_SIZE         0x40000 /* Total Size of Environment            */
 342 #define CONFIG_ENV_SECT_SIZE    0x40000 /* Total Size of Environment Sector     */
 343
 344 /* Address and size of Redundant Environment Sector     */
 345 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE)
 346 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 347
 348 #endif  /* __CONFIG_H */