include/configs/tx48.h

   1 /*
   2  * tx48.h
   3  *
   4  * Copyright (C) 2012-2014 Lothar Waßmann <LW@KARO-electronics.de>
   5  *
   6  * based on: am335x_evm
   7  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   8  *
   9  * SPDX-License-Identifier:      GPL-2.0
  10  *
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #define CONFIG_AM33XX                   /* must be set before including omap.h */
  17
  18 #include <linux/sizes.h>
  19 #include <asm/arch/omap.h>
  20
  21 /*
  22  * Ka-Ro TX48 board - SoC configuration
  23  */
  24 #define CONFIG_OMAP
  25 #define CONFIG_AM33XX_GPIO
  26 #define CONFIG_SYS_HZ                   1000    /* Ticks per second */
  27
  28 #ifndef CONFIG_SPL_BUILD
  29 #define CONFIG_SKIP_LOWLEVEL_INIT
  30 #define CONFIG_SHOW_ACTIVITY
  31 #define CONFIG_DISPLAY_CPUINFO
  32 #define CONFIG_DISPLAY_BOARDINFO
  33 #define CONFIG_BOARD_LATE_INIT
  34
  35 /* LCD Logo and Splash screen support */
  36 #define CONFIG_LCD
  37 #ifdef CONFIG_LCD
  38 #define CONFIG_VIDEO_DA8XX
  39 #define CONFIG_SPLASH_SCREEN
  40 #define CONFIG_SPLASH_SCREEN_ALIGN
  41 #define CONFIG_AM335X_LCD
  42 #define DAVINCI_LCD_CNTL_BASE           0x4830e000
  43 #define CONFIG_LCD_LOGO
  44 #define LCD_BPP                         LCD_COLOR32
  45 #define CONFIG_CMD_BMP
  46 #define CONFIG_VIDEO_BMP_RLE8
  47 #endif /* CONFIG_LCD */
  48 #endif /* CONFIG_SPL_BUILD */
  49
  50 /* Clock Defines */
  51 #define V_OSCK                          24000000  /* Clock output from T2 */
  52 #define V_SCLK                          V_OSCK
  53
  54 /*
  55  * Memory configuration options
  56  */
  57 #define CONFIG_SYS_SDRAM_DDR3
  58 #define CONFIG_NR_DRAM_BANKS            0x1             /* '1' would be converted to 'y' by define2mk.sed */
  59 #define PHYS_SDRAM_1                    0x80000000      /* SDRAM Bank #1 */
  60 #define CONFIG_MAX_RAM_BANK_SIZE        SZ_1G
  61
  62 #define CONFIG_STACKSIZE                SZ_64K
  63 #define CONFIG_SYS_MALLOC_LEN           SZ_4M
  64
  65 #define CONFIG_SYS_MEMTEST_START        (PHYS_SDRAM_1 + SZ_64M)
  66 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + SZ_8M)
  67
  68 #define CONFIG_SYS_CACHELINE_SIZE       64
  69
  70 /*
  71  * U-Boot general configurations
  72  */
  73 #define CONFIG_SYS_LONGHELP
  74 #define CONFIG_SYS_PROMPT               "TX48 U-Boot > "
  75 #define CONFIG_SYS_CBSIZE               2048    /* Console I/O buffer size */
  76 #define CONFIG_SYS_PBSIZE \
  77         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  78                                                 /* Print buffer size */
  79 #define CONFIG_SYS_MAXARGS              256     /* Max number of command args */
  80 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  81                                                 /* Boot argument buffer size */
  82 #define CONFIG_VERSION_VARIABLE                 /* U-BOOT version */
  83 #define CONFIG_AUTO_COMPLETE                    /* Command auto complete */
  84 #define CONFIG_CMDLINE_EDITING                  /* Command history etc */
  85
  86 #define CONFIG_SYS_64BIT_VSPRINTF
  87
  88 /*
  89  * Flattened Device Tree (FDT) support
  90 */
  91
  92 /*
  93  * Boot Linux
  94  */
  95 #define xstr(s)                         str(s)
  96 #define str(s)                          #s
  97 #define __pfx(x, s)                     (x##s)
  98 #define _pfx(x, s)                      __pfx(x, s)
  99
 100 #define CONFIG_CMDLINE_TAG
 101 #define CONFIG_SETUP_MEMORY_TAGS
 102 #define CONFIG_BOOTDELAY                3
 103 #define CONFIG_ZERO_BOOTDELAY_CHECK
 104 #define CONFIG_SYS_AUTOLOAD             "no"
 105 #define CONFIG_BOOTFILE                 "uImage"
 106 #define CONFIG_BOOTARGS                 "init=/linuxrc console=ttyO0,115200 ro debug panic=1"
 107 #define CONFIG_BOOTCOMMAND              "run bootcmd_${boot_mode} bootm_cmd"
 108 #define CONFIG_LOADADDR                 83000000
 109 #define CONFIG_FDTADDR                  81000000
 110 #define CONFIG_SYS_LOAD_ADDR            _pfx(0x, CONFIG_LOADADDR)
 111 #define CONFIG_SYS_FDT_ADDR             _pfx(0x, CONFIG_FDTADDR)
 112 #define CONFIG_U_BOOT_IMG_SIZE          SZ_1M
 113
 114 /*
 115  * Extra Environment Settings
 116  */
 117 #define CONFIG_SYS_CPU_CLK_STR          xstr(CONFIG_SYS_MPU_CLK)
 118
 119 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 120         "autostart=no\0"                                                \
 121         "baseboard=stk5-v3\0"                                           \
 122         "bootargs_jffs2=run default_bootargs;set bootargs ${bootargs}"  \
 123         " root=/dev/mtdblock4 rootfstype=jffs2\0"                       \
 124         "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}"    \
 125         " root=/dev/mmcblk0p2 rootwait\0"                               \
 126         "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}"    \
 127         " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock"        \
 128         " ip=dhcp\0"                                                    \
 129         "bootargs_ubifs=run default_bootargs;set bootargs ${bootargs}"  \
 130         " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0"           \
 131         "bootcmd_jffs2=set autostart no;run bootargs_jffs2"             \
 132         ";nboot linux\0"                                                \
 133         "bootcmd_mmc=set autostart no;run bootargs_mmc"                 \
 134         ";fatload mmc 0 ${loadaddr} uImage\0"                           \
 135         "bootcmd_nand=set autostart no;run bootargs_ubifs"              \
 136         ";nboot linux\0"                                                \
 137         "bootcmd_net=set autoload y;set autostart n;run bootargs_nfs"   \
 138         ";dhcp\0"                                                       \
 139         "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0"                    \
 140         "boot_mode=nand\0"                                              \
 141         "cpu_clk=" CONFIG_SYS_CPU_CLK_STR "\0"                          \
 142         "default_bootargs=set bootargs " CONFIG_BOOTARGS                \
 143         " ${append_bootargs}\0"                                         \
 144         "fdtaddr=" xstr(CONFIG_FDTADDR) "\0"                            \
 145         "fdtsave=fdt resize;nand erase.part dtb"                        \
 146         ";nand write ${fdtaddr} dtb ${fdtsize}\0"                       \
 147         "mtdids=" MTDIDS_DEFAULT "\0"                                   \
 148         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 149         "nfsroot=/tftpboot/rootfs\0"                                    \
 150         "otg_mode=device\0"                                             \
 151         "touchpanel=tsc2007\0"                                          \
 152         "video_mode=VGA\0"
 153
 154 #define MTD_NAME                        "omap2-nand.0"
 155 #define MTDIDS_DEFAULT                  "nand0=" MTD_NAME
 156
 157 /*
 158  * U-Boot Commands
 159  */
 160 #include <config_cmd_default.h>
 161
 162 /*
 163  * Serial Driver
 164  */
 165 #define CONFIG_SYS_NS16550
 166 #define CONFIG_SYS_NS16550_SERIAL
 167 #define CONFIG_SYS_NS16550_MEM32
 168 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
 169 #define CONFIG_SYS_NS16550_CLK          48000000
 170 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
 171 #define CONFIG_SYS_NS16550_COM2         0x48022000      /* UART1 */
 172 #define CONFIG_SYS_NS16550_COM6         0x481aa000      /* UART5 */
 173
 174 #define CONFIG_SYS_NS16550_COM3         0x481aa000      /* UART2 */
 175 #define CONFIG_SYS_NS16550_COM4         0x481aa000      /* UART3 */
 176 #define CONFIG_SYS_NS16550_COM5         0x481aa000      /* UART4 */
 177 #define CONFIG_CONS_INDEX               1               /* one based! */
 178 #define CONFIG_BAUDRATE                 115200          /* Default baud rate */
 179 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, }
 180 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 181
 182 /*
 183  * Ethernet Driver
 184  */
 185 #ifdef CONFIG_CMD_NET
 186 #define CONFIG_DRIVER_TI_CPSW
 187 #define CONFIG_PHY_GIGE
 188 #define CONFIG_CMD_MII
 189 /* Add for working with "strict" DHCP server */
 190 #define CONFIG_BOOTP_SUBNETMASK
 191 #define CONFIG_BOOTP_GATEWAY
 192 #define CONFIG_BOOTP_DNS
 193 #define CONFIG_BOOTP_DNS2
 194 #endif
 195
 196 /*
 197  * NAND flash driver
 198  */
 199 #ifdef CONFIG_NAND
 200 #define CONFIG_NAND_OMAP_GPMC
 201 #ifndef CONFIG_SPL_BUILD
 202 #define CONFIG_SYS_GPMC_PREFETCH_ENABLE
 203 #endif
 204 #define GPMC_NAND_ECC_LP_x8_LAYOUT
 205 #define GPMC_NAND_HW_ECC_LAYOUT_KERNEL  GPMC_NAND_HW_ECC_LAYOUT
 206 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 207 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 208 #define CONFIG_SYS_NAND_OOBSIZE         64
 209 #define CONFIG_SYS_NAND_ECCSIZE         512
 210 #define CONFIG_SYS_NAND_ECCBYTES        14
 211 #define CONFIG_SYS_NAND_MAX_CHIPS       0x1
 212 #define CONFIG_SYS_NAND_MAXBAD          20 /* Max. number of bad blocks guaranteed by manufacturer */
 213 #define CONFIG_SYS_MAX_NAND_DEVICE      0x1
 214 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 215 #ifdef CONFIG_ENV_IS_IN_NAND
 216 #define CONFIG_ENV_OVERWRITE
 217 #define CONFIG_ENV_OFFSET               (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
 218 #define CONFIG_ENV_SIZE                 SZ_128K
 219 #define CONFIG_ENV_RANGE                0x60000
 220 #endif /* CONFIG_ENV_IS_IN_NAND */
 221 #define CONFIG_SYS_NAND_BASE            0x00100000
 222 #define CONFIG_SYS_NAND_SIZE            SZ_128M
 223 #define NAND_BASE                       CONFIG_SYS_NAND_BASE
 224 #endif /* CONFIG_CMD_NAND */
 225
 226 /*
 227  * MMC Driver
 228  */
 229 #ifdef CONFIG_CMD_MMC
 230 #define CONFIG_OMAP_HSMMC
 231 #define CONFIG_OMAP_MMC_DEV_1
 232
 233 #define CONFIG_DOS_PARTITION
 234 #define CONFIG_CMD_FAT
 235 #define CONFIG_FAT_WRITE
 236 #define CONFIG_CMD_EXT2
 237
 238 /*
 239  * Environments on MMC
 240  */
 241 #ifdef CONFIG_ENV_IS_IN_MMC
 242 #define CONFIG_SYS_MMC_ENV_DEV          0
 243 #define CONFIG_ENV_OVERWRITE
 244 /* Associated with the MMC layout defined in mmcops.c */
 245 #define CONFIG_ENV_OFFSET               SZ_1K
 246 #define CONFIG_ENV_SIZE                 (SZ_128K - CONFIG_ENV_OFFSET)
 247 #define CONFIG_DYNAMIC_MMC_DEVNO
 248 #endif /* CONFIG_ENV_IS_IN_MMC */
 249 #endif /* CONFIG_CMD_MMC */
 250
 251 #ifdef CONFIG_ENV_IS_NOWHERE
 252 #define CONFIG_ENV_SIZE                 SZ_4K
 253 #endif
 254
 255 #ifdef CONFIG_ENV_OFFSET_REDUND
 256 #define MTDPARTS_DEFAULT                "mtdparts=" MTD_NAME ":"        \
 257         "128k(u-boot-spl),"                                             \
 258         "1m(u-boot),"                                                   \
 259         xstr(CONFIG_ENV_RANGE)                                          \
 260         "(env),"                                                        \
 261         xstr(CONFIG_ENV_RANGE)                                          \
 262         "(env2),6m(linux),32m(rootfs),89216k(userfs),512k@0x7f00000(dtb),512k@0x7f80000(bbt)ro"
 263 #else
 264 #define MTDPARTS_DEFAULT                "mtdparts=" MTD_NAME ":"        \
 265         "128k(u-boot-spl),"                                             \
 266         "1m(u-boot),"                                                   \
 267         xstr(CONFIG_ENV_RANGE)                                          \
 268         "(env),6m(linux),32m(rootfs),89600k(userfs),512k@0x7f00000(dtb),512k@0x7f80000(bbt)ro"
 269 #endif
 270
 271 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 272 #define SRAM0_SIZE                      SZ_64K
 273 #define OCMC_SRAM_BASE                  0x40300000
 274 #define CONFIG_SPL_STACK                (OCMC_SRAM_BASE + 0xb800)
 275 #define CONFIG_SYS_INIT_SP_ADDR         (PHYS_SDRAM_1 + SZ_32K)
 276
 277  /* Platform/Board specific defs */
 278 #define CONFIG_SYS_TIMERBASE            0x48040000      /* Use Timer2 */
 279 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 280
 281 /* Defines for SPL */
 282 #define CONFIG_SPL_FRAMEWORK
 283 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
 284 #define CONFIG_SPL_GPIO_SUPPORT
 285 #ifdef CONFIG_NAND_OMAP_GPMC
 286 #define CONFIG_SPL_NAND_SUPPORT
 287 #define CONFIG_SPL_NAND_DRIVERS
 288 #define CONFIG_SPL_NAND_BASE
 289 #define CONFIG_SPL_NAND_ECC
 290 #define CONFIG_SPL_NAND_AM33XX_BCH
 291 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 292 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE /   \
 293                                         CONFIG_SYS_NAND_PAGE_SIZE)
 294 #define CONFIG_SYS_NAND_BLOCK_SIZE      SZ_128K
 295 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 296 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
 297                                          10, 11, 12, 13, 14, 15, 16, 17, \
 298                                          18, 19, 20, 21, 22, 23, 24, 25, \
 299                                          26, 27, 28, 29, 30, 31, 32, 33, \
 300                                          34, 35, 36, 37, 38, 39, 40, 41, \
 301                                          42, 43, 44, 45, 46, 47, 48, 49, \
 302                                          50, 51, 52, 53, 54, 55, 56, 57, }
 303 #endif
 304
 305 #define CONFIG_SPL_BSS_START_ADDR       PHYS_SDRAM_1
 306 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_512K
 307
 308 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 309
 310 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 311 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 312 #define CONFIG_SPL_SERIAL_SUPPORT
 313 #define CONFIG_SPL_YMODEM_SUPPORT
 314 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 315
 316 /*
 317  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 318  * 64 bytes before this address should be set aside for u-boot.img's
 319  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 320  * other needs.
 321  */
 322 #define CONFIG_SYS_SPL_MALLOC_START     (PHYS_SDRAM_1 + SZ_2M + SZ_32K)
 323 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_1M
 324
 325 #endif  /* __CONFIG_H */