2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
7 #ifndef __CONFIGS_TX51_H
8 #define __CONFIGS_TX51_H
10 #define CONFIG_MX51 /* must be set before including imx-regs.h */
12 #include <asm/sizes.h>
13 #include <asm/arch/imx-regs.h>
16 * Ka-Ro TX51 board - SoC configuration
18 #define CONFIG_SYS_MX5_IOMUX_V3
19 #define CONFIG_MXC_GPIO /* GPIO control */
20 #define CONFIG_SYS_MX5_HCLK 24000000
21 #define CONFIG_SYS_DDR_CLKSEL 0
22 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
23 #define CONFIG_SHOW_ACTIVITY
24 #define CONFIG_DISPLAY_BOARDINFO
25 #define CONFIG_BOARD_LATE_INIT
26 #define CONFIG_BOARD_EARLY_INIT_F
28 #if CONFIG_SYS_CPU_CLK == 600
29 #define TX51_MOD_PREFIX "6"
30 #elif CONFIG_SYS_CPU_CLK == 800
31 #define TX51_MOD_PREFIX "8"
32 #define CONFIG_MX51_PLL_ERRATA
34 #error Invalid CPU clock
37 /* LCD Logo and Splash screen support */
40 #define CONFIG_SPLASH_SCREEN
41 #define CONFIG_SPLASH_SCREEN_ALIGN
42 #define CONFIG_VIDEO_IPUV3
43 #define CONFIG_IPUV3_CLK 200000000
44 #define CONFIG_LCD_LOGO
45 #define LCD_BPP LCD_COLOR24
46 #define CONFIG_CMD_BMP
47 #define CONFIG_VIDEO_BMP_RLE8
48 #endif /* CONFIG_LCD */
51 * Memory configurations
53 #define PHYS_SDRAM_1 0x90000000 /* Base address of bank 1 */
54 #define PHYS_SDRAM_1_SIZE SZ_128M
55 #if CONFIG_NR_DRAM_BANKS > 1
56 #define PHYS_SDRAM_2 0x98000000 /* Base address of bank 2 */
57 #define PHYS_SDRAM_2_SIZE SZ_128M
59 #define TX51_MOD_SUFFIX "0"
61 #define CONFIG_STACKSIZE SZ_128K
62 #define CONFIG_SYS_MALLOC_LEN SZ_8M
63 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
64 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + SZ_4M) /* 4 MB RAM test */
65 #if CONFIG_SYS_SDRAM_CLK == 200
66 #define CONFIG_SYS_CLKTL_CBCDR 0x59e35180
67 #define TX51_MOD_SUFFIX "1"
68 #elif CONFIG_SYS_SDRAM_CLK == 166
69 #define CONFIG_SYS_CLKTL_CBCDR 0x01e35180
70 #ifndef TX51_MOD_SUFFIX
71 #define TX51_MOD_SUFFIX "2"
74 #error Invalid SDRAM clock
78 * U-Boot general configurations
80 #define CONFIG_SYS_LONGHELP
81 #define CONFIG_SYS_PROMPT "TX51 U-Boot > "
82 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
83 #define CONFIG_SYS_PBSIZE \
84 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
85 /* Print buffer size */
86 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
87 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
88 /* Boot argument buffer size */
89 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
90 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
91 #define CONFIG_CMDLINE_EDITING /* Command history etc */
93 #define CONFIG_SYS_64BIT_VSPRINTF
94 #define CONFIG_SYS_NO_FLASH
97 * Flattened Device Tree (FDT) support
99 #define CONFIG_OF_LIBFDT
100 #define CONFIG_OF_EMBED
101 #define CONFIG_OF_BOARD_SETUP
102 #define CONFIG_DEFAULT_DEVICE_TREE tx51
103 #define CONFIG_ARCH_DEVICE_TREE mx51
104 #define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
109 #define xstr(s) str(s)
111 #define __pfx(x, s) (x##s)
112 #define _pfx(x, s) __pfx(x, s)
114 #define CONFIG_CMDLINE_TAG
115 #define CONFIG_SETUP_MEMORY_TAGS
116 #define CONFIG_BOOTDELAY 3
117 #define CONFIG_ZERO_BOOTDELAY_CHECK
118 #define CONFIG_SYS_AUTOLOAD "no"
119 #define CONFIG_BOOTFILE "uImage"
120 #define CONFIG_BOOTARGS "console=ttymxc0,115200 ro debug panic=1"
121 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
122 #define CONFIG_LOADADDR 94000000
123 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
124 #define CONFIG_U_BOOT_IMG_SIZE SZ_1M
125 #define CONFIG_HW_WATCHDOG
130 #define CONFIG_EXTRA_ENV_SETTINGS \
132 "baseboard=stk5-v3\0" \
133 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
134 " root=/dev/mmcblk0p3 rootwait\0" \
135 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
136 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
137 "nfsroot=/tftpboot/rootfs\0" \
138 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
139 " root=/dev/nfs ip=dhcp nfsroot=${nfs_server}:${nfsroot},nolock\0"\
140 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
141 "mmc read ${loadaddr} 100 3000;run bootm_cmd\0" \
142 "bootcmd_nand=set autostart no;run bootargs_nand;" \
143 "nboot linux;run bootm_cmd\0" \
144 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
146 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
147 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
148 " video=${video_mode} ${append_bootargs}\0" \
149 "cpu_clk=" xstr(CONFIG_SYS_CPU_CLK) "\0" \
150 "fdtaddr=91000000\0" \
151 "mtdids=" MTDIDS_DEFAULT "\0" \
152 "mtdparts=" MTDPARTS_DEFAULT "\0" \
153 "otg_mode=device\0" \
154 "touchpanel=tsc2007\0" \
155 "video_mode=VGA-1:640x480MR-24@60\0"
157 #define MTD_NAME "mxc_nand"
158 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
159 #define CONFIG_FDT_FIXUP_PARTITIONS
164 #include <config_cmd_default.h>
165 #define CONFIG_CMD_CACHE
167 #define CONFIG_CMD_IIM
169 #define CONFIG_CMD_MMC
170 #define CONFIG_CMD_NAND
171 #define CONFIG_CMD_MTDPARTS
172 #define CONFIG_CMD_BOOTCE
173 #define CONFIG_CMD_TIME
174 #define CONFIG_CMD_MEMTEST
179 #define CONFIG_MXC_UART
180 #define CONFIG_MXC_UART_BASE UART1_BASE
181 #define CONFIG_MXC_GPIO
182 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
183 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
184 #define CONFIG_SYS_CONSOLE_INFO_QUIET
189 #define CONFIG_FEC_MXC
190 #ifdef CONFIG_FEC_MXC
191 #define IMX_FEC_BASE FEC_BASE_ADDR
192 #define CONFIG_FEC_MXC_PHYADDR 0x1f
193 #define CONFIG_PHYLIB
194 #define CONFIG_PHY_SMSC
196 #define CONFIG_FEC_XCV_TYPE MII100
197 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
198 #define CONFIG_CMD_MII
199 #define CONFIG_CMD_DHCP
200 #define CONFIG_CMD_PING
201 /* Add for working with "strict" DHCP server */
202 #define CONFIG_BOOTP_SUBNETMASK
203 #define CONFIG_BOOTP_GATEWAY
204 #define CONFIG_BOOTP_DNS
210 #ifdef CONFIG_CMD_NAND
211 #define CONFIG_MTD_DEVICE
212 #define CONFIG_ENV_IS_IN_NAND
213 #define CONFIG_NAND_MXC
214 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI // 0xcfff0000
215 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR // 0x83fdb000
216 #define CONFIG_MXC_NAND_HWECC
217 #define CONFIG_CMD_NAND_TRIMFFS
218 #define CONFIG_SYS_MAX_FLASH_SECT 1024
219 #define CONFIG_SYS_MAX_FLASH_BANKS 1
220 #define CONFIG_SYS_NAND_MAX_CHIPS 1
221 #define CONFIG_SYS_MAX_NAND_DEVICE 1
222 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
223 #define CONFIG_SYS_NAND_USE_FLASH_BBT
224 #ifdef CONFIG_ENV_IS_IN_NAND
225 #define CONFIG_ENV_OVERWRITE
226 #define CONFIG_ENV_OFFSET CONFIG_U_BOOT_IMG_SIZE
227 #define CONFIG_ENV_SIZE 0x20000 /* 128 KiB */
228 #define CONFIG_ENV_RANGE 0x60000
230 #ifndef CONFIG_SYS_NO_FLASH
231 #define CONFIG_CMD_FLASH
232 #define CONFIG_SYS_NAND_BASE 0xa0000000
235 #define CONFIG_SYS_NAND_BASE 0x00000000
236 #define CONFIG_CMD_ROMUPDATE
238 #endif /* CONFIG_CMD_NAND */
243 #ifdef CONFIG_CMD_MMC
244 #ifndef CONFIG_ENV_IS_IN_NAND
245 #define CONFIG_ENV_IS_IN_MMC
248 #define CONFIG_GENERIC_MMC
249 #define CONFIG_FSL_ESDHC
250 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
251 #define CONFIG_SYS_FSL_ESDHC_NUM 2
253 #define CONFIG_DOS_PARTITION
254 #define CONFIG_CMD_FAT
255 #define CONFIG_CMD_EXT2
258 * Environments on MMC
260 #ifdef CONFIG_ENV_IS_IN_MMC
261 #define CONFIG_SYS_MMC_ENV_DEV 0
262 #define CONFIG_ENV_OVERWRITE
263 /* Associated with the MMC layout defined in mmcops.c */
264 #define CONFIG_ENV_OFFSET SZ_1K
265 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
266 #define CONFIG_DYNAMIC_MMC_DEVNO
267 #endif /* CONFIG_ENV_IS_IN_MMC */
268 #endif /* CONFIG_CMD_MMC */
270 #ifdef CONFIG_ENV_OFFSET_REDUND
271 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
273 xstr(CONFIG_ENV_RANGE) \
275 xstr(CONFIG_ENV_RANGE) \
276 "(env2),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
278 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
280 xstr(CONFIG_ENV_RANGE) \
281 "(env),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
284 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
285 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
286 GENERATED_GBL_DATA_SIZE)
288 #ifdef CONFIG_CMD_IIM
289 #define CONFIG_FSL_IIM
292 #endif /* __CONFIGS_TX51_H */