2 * Copyright (C) 2012-2015 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #ifndef CONFIG_SOC_MX6UL
12 #define CONFIG_ARM_ERRATA_743622
13 #define CONFIG_ARM_ERRATA_751472
14 #define CONFIG_ARM_ERRATA_794072
15 #define CONFIG_ARM_ERRATA_761320
17 #ifndef CONFIG_SYS_L2CACHE_OFF
18 #define CONFIG_SYS_L2_PL310
19 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE
22 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
25 #define CONFIG_BOARD_POSTCLK_INIT
26 #define CONFIG_MXC_GPT_HCLK
28 #include <linux/kconfig.h>
29 #include <linux/sizes.h>
30 #include <asm/arch/imx-regs.h>
33 * Ka-Ro TX6 board - SoC configuration
35 #define CONFIG_SYS_MX6_HCLK 24000000
36 #define CONFIG_SYS_MX6_CLK32 32768
37 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
38 #define CONFIG_SHOW_ACTIVITY
39 #define CONFIG_ARCH_CPU_INIT
40 #define CONFIG_DISPLAY_BOARDINFO
41 #define CONFIG_BOARD_LATE_INIT
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_SYS_GENERIC_BOARD
45 #ifndef CONFIG_TX6_UBOOT_MFG
46 /* LCD Logo and Splash screen support */
48 #define CONFIG_SPLASH_SCREEN
49 #define CONFIG_SPLASH_SCREEN_ALIGN
50 #define CONFIG_VIDEO_IPUV3
51 #define CONFIG_IPUV3_CLK (CONFIG_SYS_SDRAM_CLK * 1000000 / 2)
52 #define CONFIG_LCD_LOGO
53 #define LCD_BPP LCD_COLOR32
54 #define CONFIG_CMD_BMP
55 #define CONFIG_VIDEO_BMP_RLE8
56 #endif /* CONFIG_LCD */
57 #endif /* CONFIG_TX6_UBOOT_MFG */
60 * Memory configuration options
62 #define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */
63 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
64 #ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
65 #define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
66 #elif defined(CONFIG_SYS_SDRAM_BUS_WIDTH_32)
67 #define PHYS_SDRAM_1_WIDTH 32
68 #elif defined(CONFIG_SYS_SDRAM_BUS_WIDTH_16)
69 #define PHYS_SDRAM_1_WIDTH 16
71 #define PHYS_SDRAM_1_WIDTH 64
73 #define PHYS_SDRAM_1_SIZE (SZ_512M / 32 * PHYS_SDRAM_1_WIDTH)
74 #ifdef CONFIG_SOC_MX6Q
75 #define CONFIG_SYS_SDRAM_CLK 528
77 #define CONFIG_SYS_SDRAM_CLK 400
79 #define CONFIG_STACKSIZE SZ_128K
80 #define CONFIG_SPL_STACK (IRAM_BASE_ADDR + SZ_16K)
81 #define CONFIG_SYS_MALLOC_LEN SZ_8M
82 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
83 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
86 * U-Boot general configurations
88 #define CONFIG_SYS_LONGHELP
89 #if defined(CONFIG_SOC_MX6Q)
90 #elif defined(CONFIG_SOC_MX6DL)
91 #elif defined(CONFIG_SOC_MX6S)
93 #error Unsupported i.MX6 processor variant
95 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
96 #define CONFIG_SYS_PBSIZE \
97 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
98 /* Print buffer size */
99 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
100 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
101 /* Boot argument buffer size */
102 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
103 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
104 #define CONFIG_CMDLINE_EDITING /* Command history etc */
106 #define CONFIG_SYS_64BIT_VSPRINTF
111 #define xstr(s) str(s)
113 #define __pfx(x, s) (x##s)
114 #define _pfx(x, s) __pfx(x, s)
116 #define CONFIG_CMDLINE_TAG
117 #define CONFIG_INITRD_TAG
118 #define CONFIG_SETUP_MEMORY_TAGS
119 #ifndef CONFIG_TX6_UBOOT_MFG
120 #define CONFIG_BOOTDELAY 1
122 #define CONFIG_BOOTDELAY 0
124 #define CONFIG_ZERO_BOOTDELAY_CHECK
125 #define CONFIG_SYS_AUTOLOAD "no"
126 #define DEFAULT_BOOTCMD "run bootcmd_${boot_mode} bootm_cmd"
127 #define CONFIG_BOOTFILE "uImage"
128 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
129 #ifndef CONFIG_TX6_UBOOT_MFG
130 #define CONFIG_BOOTCOMMAND DEFAULT_BOOTCMD
132 #define CONFIG_BOOTCOMMAND "setenv bootcmd '" DEFAULT_BOOTCMD "';" \
133 "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
134 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL))
135 #define CONFIG_BOOTCMD_MFG_LOADADDR 80500000
137 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
139 #define CONFIG_DELAY_ENVIRONMENT
140 #endif /* CONFIG_TX6_UBOOT_MFG */
141 #if (defined(CONFIG_SOC_MX6SX) || defined(CONFIG_SOC_MX6SL) || defined(CONFIG_SOC_MX6UL))
142 #define CONFIG_LOADADDR 82000000
143 #define CONFIG_FDTADDR 81000000
145 #define CONFIG_LOADADDR 18000000
146 #define CONFIG_FDTADDR 11000000
148 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
149 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
150 #ifndef CONFIG_SYS_LVDS_IF
151 #define DEFAULT_VIDEO_MODE "VGA"
153 #define DEFAULT_VIDEO_MODE "HSD100PXN1"
159 #ifdef CONFIG_TX6_UBOOT_NOENV
160 #define CONFIG_EXTRA_ENV_SETTINGS \
164 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
165 "mtdids=" MTDIDS_DEFAULT "\0" \
166 "mtdparts=" MTDPARTS_DEFAULT "\0"
168 #define CONFIG_EXTRA_ENV_SETTINGS \
170 "baseboard=stk5-v3\0" \
171 "bootargs_jffs2=run default_bootargs" \
172 ";setenv bootargs ${bootargs}" \
173 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
174 "bootargs_mmc=run default_bootargs;setenv bootargs ${bootargs}" \
176 "bootargs_nfs=run default_bootargs;setenv bootargs ${bootargs}" \
177 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
179 "bootargs_ubifs=run default_bootargs" \
180 ";setenv bootargs ${bootargs}" \
181 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
182 "bootcmd_jffs2=setenv autostart no;run bootargs_jffs2" \
184 "bootcmd_mmc=setenv autostart no;run bootargs_mmc" \
185 ";fatload mmc 0 ${loadaddr} uImage\0" \
186 CONFIG_SYS_BOOT_CMD_NAND \
187 "bootcmd_net=setenv autoload y;setenv autostart n" \
188 ";run bootargs_nfs" \
190 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
191 "boot_mode=" CONFIG_SYS_DEFAULT_BOOT_MODE "\0" \
193 "default_bootargs=setenv bootargs " CONFIG_BOOTARGS \
194 " ${append_bootargs}\0" \
197 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
198 CONFIG_SYS_FDTSAVE_CMD \
199 "mtdids=" MTDIDS_DEFAULT "\0" \
200 "mtdparts=" MTDPARTS_DEFAULT "\0" \
201 "nfsroot=/tftpboot/rootfs\0" \
202 "otg_mode=device\0" \
204 "touchpanel=tsc2007\0" \
205 "video_mode=" DEFAULT_VIDEO_MODE "\0"
206 #endif /* CONFIG_ENV_IS_NOWHERE */
208 #ifdef CONFIG_TX6_NAND
209 #define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
210 #define CONFIG_SYS_BOOT_CMD_NAND \
211 "bootcmd_nand=setenv autostart no;run bootargs_ubifs;nboot linux\0"
212 #define CONFIG_SYS_FDTSAVE_CMD \
213 "fdtsave=fdt resize;nand erase.part dtb" \
214 ";nand write ${fdtaddr} dtb ${fdtsize}\0"
215 #define MTD_NAME "gpmi-nand"
216 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
217 #define CONFIG_SYS_NAND_ONFI_DETECTION
218 #define MMC_ROOT_STR " root=/dev/mmcblk0p2 rootwait\0"
219 #define ROOTPART_UUID_STR ""
220 #define EMMC_BOOT_ACK_STR ""
221 #define EMMC_BOOT_PART_STR ""
223 #define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
224 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
225 #define CONFIG_SYS_BOOT_CMD_NAND ""
226 #define CONFIG_SYS_FDTSAVE_CMD \
227 "fdtsave=mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} ${emmc_boot_part}" \
228 ";mmc write ${fdtaddr} " xstr(CONFIG_SYS_DTB_BLKNO) " 80" \
229 ";mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 0\0"
231 #define MTDIDS_DEFAULT ""
232 #define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
233 #define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
234 #define EMMC_BOOT_ACK_STR "emmc_boot_ack=1\0"
235 #define EMMC_BOOT_PART_STR "emmc_boot_part=" \
236 xstr(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0"
237 #endif /* CONFIG_TX6_NAND */
242 #define CONFIG_MXC_UART
243 #define CONFIG_MXC_UART_BASE UART1_BASE
244 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
245 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
246 #define CONFIG_SYS_CONSOLE_INFO_QUIET
247 #define CONFIG_CONS_INDEX 1
252 #define CONFIG_MXC_GPIO
257 #ifdef CONFIG_FEC_MXC
258 /* This is required for the FEC driver to work with cache enabled */
259 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
261 #define IMX_FEC_BASE ENET_BASE_ADDR
262 #define CONFIG_FEC_XCV_TYPE RMII
268 #ifdef CONFIG_HARD_I2C
269 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
270 #define CONFIG_SYS_I2C_SPEED 400000
271 #if defined(CONFIG_TX6_REV)
272 #if CONFIG_TX6_REV == 0x1
273 #define CONFIG_SYS_I2C_SLAVE 0x3c
274 #define CONFIG_LTC3676
275 #elif CONFIG_TX6_REV == 0x2
276 #define CONFIG_SYS_I2C_SLAVE 0x32
277 #define CONFIG_RN5T618
278 #elif CONFIG_TX6_REV == 0x3
279 #define CONFIG_SYS_I2C_SLAVE 0x33
280 #define CONFIG_RN5T567
282 #error Unsupported TX6 module revision
284 #endif /* CONFIG_TX6_REV */
285 /* autodetect which PMIC is present to derive TX6_REV */
286 #define CONFIG_LTC3676 /* TX6_REV == 1 */
287 #define CONFIG_RN5T567 /* TX6_REV == 3 */
288 #endif /* CONFIG_CMD_I2C */
290 #define CONFIG_ENV_OVERWRITE
295 #ifdef CONFIG_TX6_NAND
296 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
297 #define CONFIG_SYS_MAX_FLASH_BANKS 0x1
298 #define CONFIG_SYS_NAND_MAX_CHIPS 0x1
299 #define CONFIG_SYS_MAX_NAND_DEVICE 0x1
300 #define CONFIG_SYS_NAND_BASE 0x00000000
301 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
303 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
304 #define CONFIG_ENV_SIZE SZ_128K
305 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
306 #endif /* CONFIG_TX6_NAND */
308 #ifdef CONFIG_ENV_OFFSET_REDUND
309 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
311 xstr(CONFIG_SYS_ENV_PART_SIZE) \
313 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
315 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
317 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
318 #endif /* CONFIG_ENV_OFFSET_REDUND */
323 #ifdef CONFIG_FSL_ESDHC
324 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
326 #ifdef CONFIG_CMD_MMC
327 #define CONFIG_CMD_FAT
328 #define CONFIG_FAT_WRITE
329 #define CONFIG_CMD_EXT2
332 * Environments on MMC
334 #ifdef CONFIG_ENV_IS_IN_MMC
335 #define CONFIG_SYS_MMC_ENV_DEV 0
336 #define CONFIG_SYS_MMC_ENV_PART 0x1
337 #define CONFIG_DYNAMIC_MMC_DEVNO
338 #endif /* CONFIG_ENV_IS_IN_MMC */
339 #endif /* CONFIG_CMD_MMC */
341 #ifdef CONFIG_TX6_NAND
342 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
343 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
344 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
346 CONFIG_SYS_ENV_PART_STR \
347 "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
348 xstr(CONFIG_SYS_DTB_PART_SIZE) \
349 "@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)," \
350 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
351 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
353 #define MTDPARTS_DEFAULT ""
356 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
357 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
358 GENERATED_GBL_DATA_SIZE)
360 #endif /* __CONFIG_H */