2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
16 #include <asm/sizes.h>
19 * Ka-Ro TX6DL board - SoC configuration
23 #define CONFIG_SYS_MX6_HCLK 24000000
24 #define CONFIG_SYS_MX6_CLK32 32768
25 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
26 #define CONFIG_SHOW_ACTIVITY
27 #define CONFIG_ARCH_CPU_INIT
28 #define CONFIG_DISPLAY_BOARDINFO
29 #define CONFIG_BOARD_LATE_INIT
30 #define CONFIG_BOARD_EARLY_INIT_F
33 /* LCD Logo and Splash screen support */
35 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
37 #define CONFIG_SPLASH_SCREEN
38 #define CONFIG_SPLASH_SCREEN_ALIGN
39 #define CONFIG_VIDEO_IPUV3
40 #define CONFIG_IPU_CLKRATE 266000000
41 #define CONFIG_LCD_LOGO
42 #define LCD_BPP LCD_COLOR24
43 #define CONFIG_CMD_BMP
44 #define CONFIG_VIDEO_BMP_RLE8
45 #endif /* CONFIG_LCD */
46 #endif /* CONFIG_MFG */
49 * Memory configuration options
51 #define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
52 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
53 #define PHYS_SDRAM_1_SIZE SZ_512M
54 #define PHYS_SDRAM_1_WIDTH 32
55 #define CONFIG_STACKSIZE SZ_128K
56 #define CONFIG_SYS_MALLOC_LEN SZ_8M
57 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
58 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
59 #define CONFIG_SYS_SDRAM_CLK 400
62 * U-Boot general configurations
64 #define CONFIG_SYS_LONGHELP
65 #define CONFIG_SYS_PROMPT "TX6DL U-Boot > "
66 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
67 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
68 sizeof(CONFIG_SYS_PROMPT) + 16) /* Print buffer size */
69 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
70 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
71 /* Boot argument buffer size */
72 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
73 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
74 #define CONFIG_CMDLINE_EDITING /* Command history etc */
76 #define CONFIG_SYS_64BIT_VSPRINTF
77 #define CONFIG_SYS_NO_FLASH
80 * Flattened Device Tree (FDT) support
83 #define CONFIG_OF_LIBFDT
84 #ifdef CONFIG_OF_LIBFDT
85 #define CONFIG_FDT_FIXUP_PARTITIONS
86 #define CONFIG_OF_EMBED
87 #define CONFIG_OF_BOARD_SETUP
88 #define CONFIG_DEFAULT_DEVICE_TREE tx6dl
89 #define CONFIG_ARCH_DEVICE_TREE mx6dl
90 #define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
91 #endif /* CONFIG_OF_LIBFDT */
92 #endif /* CONFIG_MFG */
97 #define xstr(s) str(s)
99 #define __pfx(x, s) (x##s)
100 #define _pfx(x, s) __pfx(x, s)
102 #define CONFIG_CMDLINE_TAG
103 #define CONFIG_INITRD_TAG
104 #define CONFIG_SETUP_MEMORY_TAGS
105 #define CONFIG_SERIAL_TAG
107 #define CONFIG_BOOTDELAY 1
109 #define CONFIG_BOOTDELAY 0
111 #define CONFIG_ZERO_BOOTDELAY_CHECK
112 #define CONFIG_SYS_AUTOLOAD "no"
114 #define CONFIG_BOOTFILE "uImage"
115 #define CONFIG_BOOTARGS "console=ttymxc0,115200 ro debug panic=1"
116 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
118 #define CONFIG_BOOTCOMMAND "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
119 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
120 #define CONFIG_DELAY_ENVIRONMENT
121 #endif /* CONFIG_MFG */
122 #define CONFIG_LOADADDR 18000000
123 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
124 #define CONFIG_U_BOOT_IMG_SIZE SZ_1M
125 #define CONFIG_IMX_WATCHDOG
126 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000
132 #ifdef CONFIG_ENV_IS_NOWHERE
133 #define CONFIG_EXTRA_ENV_SETTINGS \
137 "fdtaddr=11000000\0" \
138 "mtdids=" MTDIDS_DEFAULT "\0" \
139 "mtdparts=" MTDPARTS_DEFAULT "\0"
141 #define CONFIG_EXTRA_ENV_SETTINGS \
143 "baseboard=stk5-v3\0" \
144 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
145 " root=/dev/mmcblk0p3 rootwait\0" \
146 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
147 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
148 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
149 " root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},nolock\0"\
150 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
151 "fatload mmc 0 ${loadaddr} uImage;run bootm_cmd\0" \
152 "bootcmd_nand=set autostart no;run bootargs_nand;" \
153 "nboot linux;run bootm_cmd\0" \
154 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
156 "bootm_cmd=fdt boardsetup;bootm ${loadaddr} - ${fdtaddr}\0" \
158 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
159 " video=${video_mode} ${append_bootargs}\0" \
160 "fdtaddr=11000000\0" \
161 "mtdids=" MTDIDS_DEFAULT "\0" \
162 "mtdparts=" MTDPARTS_DEFAULT "\0" \
163 "nfsroot=/tftpboot/rootfs\0" \
164 "otg_mode=device\0" \
165 "touchpanel=tsc2007\0" \
166 "video_mode=VGA-1:640x480MR-24@60\0"
167 #endif /* CONFIG_ENV_IS_NOWHERE */
168 #endif /* CONFIG_MFG */
170 #define MTD_NAME "gpmi-nand"
171 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
172 #define CONFIG_SYS_NAND_ONFI_DETECTION
177 #include <config_cmd_default.h>
178 #define CONFIG_CMD_CACHE
179 #define CONFIG_CMD_MMC
180 #define CONFIG_CMD_NAND
181 #define CONFIG_CMD_MTDPARTS
182 #define CONFIG_CMD_BOOTCE
183 #define CONFIG_CMD_TIME
184 #define CONFIG_CMD_I2C
189 #define CONFIG_MXC_UART
190 #define CONFIG_MXC_UART_BASE UART1_BASE
191 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
192 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
193 #define CONFIG_SYS_CONSOLE_INFO_QUIET
198 #define CONFIG_MXC_GPIO
203 #define CONFIG_FEC_MXC
204 #ifdef CONFIG_FEC_MXC
205 /* This is required for the FEC driver to work with cache enabled */
206 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
208 #define IMX_FEC_BASE ENET_BASE_ADDR
209 #define CONFIG_FEC_MXC_PHYADDR 0
210 #define CONFIG_PHYLIB
211 #define CONFIG_PHY_SMSC
213 #define CONFIG_FEC_XCV_TYPE RMII
214 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
215 #define CONFIG_CMD_MII
216 #define CONFIG_CMD_DHCP
217 #define CONFIG_CMD_PING
218 /* Add for working with "strict" DHCP server */
219 #define CONFIG_BOOTP_SUBNETMASK
220 #define CONFIG_BOOTP_GATEWAY
221 #define CONFIG_BOOTP_DNS
227 #ifdef CONFIG_CMD_I2C
228 #define CONFIG_HARD_I2C 1
229 #define CONFIG_I2C_MXC 1
230 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
231 #define CONFIG_SYS_I2C_MX6_PORT1
232 #define CONFIG_SYS_I2C_SPEED 10000
233 #define CONFIG_SYS_I2C_SLAVE 0x3c
234 #define CONFIG_MX6_INTER_LDO_BYPASS 0
237 #ifndef CONFIG_ENV_IS_NOWHERE
238 /* define one of the following options:
239 #define CONFIG_ENV_IS_IN_NAND
240 #define CONFIG_ENV_IS_IN_MMC
242 #define CONFIG_ENV_IS_IN_NAND
244 #define CONFIG_ENV_OVERWRITE
249 #ifdef CONFIG_CMD_NAND
250 #define CONFIG_MTD_DEVICE
252 #define CONFIG_MTD_DEBUG
253 #define CONFIG_MTD_DEBUG_VERBOSE 4
255 #define CONFIG_NAND_MXS
256 #define CONFIG_NAND_PAGE_SIZE 2048
257 #define CONFIG_NAND_OOB_SIZE 64
258 #define CONFIG_NAND_PAGES_PER_BLOCK 64
259 #define CONFIG_APBH_DMA
260 #define CONFIG_APBH_DMA_BURST
261 #define CONFIG_APBH_DMA_BURST8
262 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
263 #define CONFIG_CMD_NAND_TRIMFFS
264 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
265 #define CONFIG_SYS_MAX_FLASH_SECT 1024
266 #define CONFIG_SYS_MAX_FLASH_BANKS 1
267 #define CONFIG_SYS_NAND_MAX_CHIPS 1
268 #define CONFIG_SYS_MAX_NAND_DEVICE 1
269 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
270 #define CONFIG_SYS_NAND_USE_FLASH_BBT
271 #define CONFIG_SYS_NAND_BASE 0x00000000
272 #define CONFIG_CMD_ROMUPDATE
274 #undef CONFIG_ENV_IS_IN_NAND
275 #endif /* CONFIG_CMD_NAND */
277 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
278 #define CONFIG_ENV_SIZE SZ_128K
279 #define CONFIG_ENV_RANGE 0x60000
280 #ifdef CONFIG_ENV_OFFSET_REDUND
281 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_ENV_RANGE) \
283 xstr(CONFIG_ENV_RANGE) \
285 #define CONFIG_SYS_USERFS_PART_STR "91520k(userfs)"
287 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_ENV_RANGE) \
289 #define CONFIG_SYS_USERFS_PART_STR "91904k(userfs)"
290 #endif /* CONFIG_ENV_OFFSET_REDUND */
295 #ifdef CONFIG_CMD_MMC
297 #define CONFIG_GENERIC_MMC
298 #define CONFIG_FSL_ESDHC
299 #define CONFIG_FSL_USDHC
300 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
301 #define CONFIG_SYS_FSL_ESDHC_NUM 2
303 #define CONFIG_DOS_PARTITION
304 #define CONFIG_CMD_FAT
305 #define CONFIG_CMD_EXT2
308 * Environments on MMC
310 #ifdef CONFIG_ENV_IS_IN_MMC
311 #define CONFIG_SYS_MMC_ENV_DEV 0
312 #undef CONFIG_ENV_OFFSET
313 #undef CONFIG_ENV_SIZE
314 /* Associated with the MMC layout defined in mmcops.c */
315 #define CONFIG_ENV_OFFSET SZ_1K
316 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
317 #define CONFIG_DYNAMIC_MMC_DEVNO
318 #endif /* CONFIG_ENV_IS_IN_MMC */
320 #undef CONFIG_ENV_IS_IN_MMC
321 #endif /* CONFIG_CMD_MMC */
323 #ifdef CONFIG_ENV_IS_NOWHERE
324 #undef CONFIG_ENV_SIZE
325 #define CONFIG_ENV_SIZE SZ_4K
328 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
329 "1m@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) "(u-boot)," \
330 CONFIG_SYS_ENV_PART_STR \
331 "4m(linux),32m(rootfs),256k(dtb)," \
332 CONFIG_SYS_USERFS_PART_STR ",512k@0x7f80000(bbt)ro"
334 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
335 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
336 GENERATED_GBL_DATA_SIZE)
338 #ifdef CONFIG_CMD_IIM
339 #define CONFIG_IMX_IIM
342 #endif /* __CONFIG_H */