ARMv8: enable DM in vexpress64 board
[karo-tx-uboot.git] / include / configs / vexpress_aemv8a.h
1 /*
2  * Configuration for Versatile Express. Parts were derived from other ARM
3  *   configurations.
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #ifndef __VEXPRESS_AEMV8A_H
9 #define __VEXPRESS_AEMV8A_H
10
11 #define CONFIG_DM
12
13 /* We use generic board for v8 Versatile Express */
14 #define CONFIG_SYS_GENERIC_BOARD
15
16 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
17 #ifndef CONFIG_SEMIHOSTING
18 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
19 #endif
20 #define CONFIG_BOARD_LATE_INIT
21 #define CONFIG_ARMV8_SWITCH_TO_EL1
22 #endif
23
24 #define CONFIG_REMAKE_ELF
25
26 #if !defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && \
27     !defined(CONFIG_TARGET_VEXPRESS64_JUNO)
28 /* Base FVP and Juno not using GICv3 yet */
29 #define CONFIG_GICV3
30 #endif
31
32 /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
33
34 #define CONFIG_SUPPORT_RAW_INITRD
35
36 /* Cache Definitions */
37 #define CONFIG_SYS_DCACHE_OFF
38 #define CONFIG_SYS_ICACHE_OFF
39
40 #define CONFIG_IDENT_STRING             " vexpress_aemv8a"
41 #define CONFIG_BOOTP_VCI_STRING         "U-boot.armv8.vexpress_aemv8a"
42
43 /* Link Definitions */
44 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
45 /* ATF loads u-boot here for BASE_FVP model */
46 #define CONFIG_SYS_TEXT_BASE            0x88000000
47 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
48 #elif CONFIG_TARGET_VEXPRESS64_JUNO
49 #define CONFIG_SYS_TEXT_BASE            0xe0000000
50 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
51 #else
52 #define CONFIG_SYS_TEXT_BASE            0x80000000
53 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
54 #endif
55
56 /* Flat Device Tree Definitions */
57 #define CONFIG_OF_LIBFDT
58
59 /* CS register bases for the original memory map. */
60 #define V2M_PA_CS0                      0x00000000
61 #define V2M_PA_CS1                      0x14000000
62 #define V2M_PA_CS2                      0x18000000
63 #define V2M_PA_CS3                      0x1c000000
64 #define V2M_PA_CS4                      0x0c000000
65 #define V2M_PA_CS5                      0x10000000
66
67 #define V2M_PERIPH_OFFSET(x)            (x << 16)
68 #define V2M_SYSREGS                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
69 #define V2M_SYSCTL                      (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
70 #define V2M_SERIAL_BUS_PCI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
71
72 #define V2M_BASE                        0x80000000
73
74 /* Common peripherals relative to CS7. */
75 #define V2M_AACI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
76 #define V2M_MMCI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
77 #define V2M_KMI0                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
78 #define V2M_KMI1                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
79
80 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
81 #define V2M_UART0                       0x7ff80000
82 #define V2M_UART1                       0x7ff70000
83 #else /* Not Juno */
84 #define V2M_UART0                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
85 #define V2M_UART1                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
86 #define V2M_UART2                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
87 #define V2M_UART3                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
88 #endif
89
90 #define V2M_WDT                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
91
92 #define V2M_TIMER01                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
93 #define V2M_TIMER23                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
94
95 #define V2M_SERIAL_BUS_DVI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
96 #define V2M_RTC                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
97
98 #define V2M_CF                          (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
99
100 #define V2M_CLCD                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
101
102 /* System register offsets. */
103 #define V2M_SYS_CFGDATA                 (V2M_SYSREGS + 0x0a0)
104 #define V2M_SYS_CFGCTRL                 (V2M_SYSREGS + 0x0a4)
105 #define V2M_SYS_CFGSTAT                 (V2M_SYSREGS + 0x0a8)
106
107 /* Generic Timer Definitions */
108 #define COUNTER_FREQUENCY               (0x1800000)     /* 24MHz */
109
110 /* Generic Interrupt Controller Definitions */
111 #ifdef CONFIG_GICV3
112 #define GICD_BASE                       (0x2f000000)
113 #define GICR_BASE                       (0x2f100000)
114 #else
115
116 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
117 #define GICD_BASE                       (0x2f000000)
118 #define GICC_BASE                       (0x2c000000)
119 #elif CONFIG_TARGET_VEXPRESS64_JUNO
120 #define GICD_BASE                       (0x2C010000)
121 #define GICC_BASE                       (0x2C02f000)
122 #else
123 #define GICD_BASE                       (0x2C001000)
124 #define GICC_BASE                       (0x2C002000)
125 #endif
126 #endif
127
128 #define CONFIG_SYS_MEMTEST_START        V2M_BASE
129 #define CONFIG_SYS_MEMTEST_END          (V2M_BASE + 0x80000000)
130
131 /* Size of malloc() pool */
132 #define CONFIG_SYS_MALLOC_F_LEN         0x2000
133 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (8 << 20))
134
135 /* Ethernet Configuration */
136 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
137 /* The real hardware Versatile express uses SMSC9118 */
138 #define CONFIG_SMC911X                  1
139 #define CONFIG_SMC911X_32_BIT           1
140 #define CONFIG_SMC911X_BASE             (0x018000000)
141 #else
142 /* The Vexpress64 simulators use SMSC91C111 */
143 #define CONFIG_SMC91111                 1
144 #define CONFIG_SMC91111_BASE            (0x01A000000)
145 #endif
146
147 /* PL011 Serial Configuration */
148 #define CONFIG_BAUDRATE                 115200
149 #ifdef CONFIG_DM
150 #define CONFIG_DM_SERIAL
151 #define CONFIG_PL01X_SERIAL
152 #else
153 #define CONFIG_SYS_SERIAL0              V2M_UART0
154 #define CONFIG_SYS_SERIAL1              V2M_UART1
155 #define CONFIG_CONS_INDEX               0
156 #define CONFIG_PL011_SERIAL
157 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
158 #define CONFIG_PL011_CLOCK              7273800
159 #else
160 #define CONFIG_PL011_CLOCK              24000000
161 #endif
162 #define CONFIG_PL01x_PORTS              {(void *)CONFIG_SYS_SERIAL0, \
163                                          (void *)CONFIG_SYS_SERIAL1}
164 #endif
165
166 #define CONFIG_BAUDRATE                 115200
167 #define CONFIG_SYS_SERIAL0              V2M_UART0
168 #define CONFIG_SYS_SERIAL1              V2M_UART1
169
170 /* Command line configuration */
171 #define CONFIG_MENU
172 /*#define CONFIG_MENU_SHOW*/
173 #define CONFIG_CMD_CACHE
174 #define CONFIG_CMD_BDI
175 #define CONFIG_CMD_BOOTI
176 #define CONFIG_CMD_UNZIP
177 #define CONFIG_CMD_DHCP
178 #define CONFIG_CMD_PXE
179 #define CONFIG_CMD_ENV
180 #define CONFIG_CMD_IMI
181 #define CONFIG_CMD_LOADB
182 #define CONFIG_CMD_MEMORY
183 #define CONFIG_CMD_MII
184 #define CONFIG_CMD_NET
185 #define CONFIG_CMD_PING
186 #define CONFIG_CMD_SAVEENV
187 #define CONFIG_CMD_RUN
188 #define CONFIG_CMD_BOOTD
189 #define CONFIG_CMD_ECHO
190 #define CONFIG_CMD_SOURCE
191 #define CONFIG_CMD_FAT
192 #define CONFIG_DOS_PARTITION
193
194 /* BOOTP options */
195 #define CONFIG_BOOTP_BOOTFILESIZE
196 #define CONFIG_BOOTP_BOOTPATH
197 #define CONFIG_BOOTP_GATEWAY
198 #define CONFIG_BOOTP_HOSTNAME
199 #define CONFIG_BOOTP_PXE
200 #define CONFIG_BOOTP_PXE_CLIENTARCH     0x100
201
202 /* Miscellaneous configurable options */
203 #define CONFIG_SYS_LOAD_ADDR            (V2M_BASE + 0x10000000)
204
205 /* Physical Memory Map */
206 #define CONFIG_NR_DRAM_BANKS            1
207 #define PHYS_SDRAM_1                    (V2M_BASE)      /* SDRAM Bank #1 */
208 #define PHYS_SDRAM_1_SIZE               0x80000000      /* 2048 MB */
209 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
210
211 /* Initial environment variables */
212 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
213 #define CONFIG_EXTRA_ENV_SETTINGS       \
214                                 "kernel_name=uImage\0"  \
215                                 "kernel_addr_r=0x80000000\0"    \
216                                 "initrd_name=ramdisk.img\0"     \
217                                 "initrd_addr_r=0x88000000\0"    \
218                                 "fdt_name=devtree.dtb\0"                \
219                                 "fdt_addr_r=0x83000000\0"               \
220                                 "fdt_high=0xffffffffffffffff\0" \
221                                 "initrd_high=0xffffffffffffffff\0"
222
223 #define CONFIG_BOOTARGS         "console=ttyAMA0 earlyprintk=pl011,"\
224                                 "0x1c090000 debug user_debug=31 "\
225                                 "loglevel=9"
226
227 #define CONFIG_BOOTCOMMAND      "fdt addr $fdt_addr_r; fdt resize; " \
228                                 "fdt chosen $initrd_addr_r $initrd_end; " \
229                                 "bootm $kernel_addr_r - $fdt_addr_r"
230
231 #define CONFIG_BOOTDELAY                1
232
233 #else
234
235 #define CONFIG_EXTRA_ENV_SETTINGS       \
236                                         "kernel_addr_r=0x80000000\0"    \
237                                         "initrd_addr_r=0x88000000\0"    \
238                                         "fdt_addr_r=0x83000000\0"               \
239                                         "fdt_high=0xa0000000\0"
240
241 #define CONFIG_BOOTARGS                 "console=ttyAMA0,115200n8 root=/dev/ram0"
242 #define CONFIG_BOOTCOMMAND              "bootm $kernel_addr_r " \
243                                         "$initrd_addr_r:$initrd_size $fdt_addr_r"
244 #define CONFIG_BOOTDELAY                -1
245 #endif
246
247 /* Do not preserve environment */
248 #define CONFIG_ENV_IS_NOWHERE           1
249 #define CONFIG_ENV_SIZE                 0x1000
250
251 /* Monitor Command Prompt */
252 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
253 #define CONFIG_SYS_PROMPT               "VExpress64# "
254 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
255                                         sizeof(CONFIG_SYS_PROMPT) + 16)
256 #define CONFIG_SYS_HUSH_PARSER
257 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
258 #define CONFIG_SYS_LONGHELP
259 #define CONFIG_CMDLINE_EDITING
260 #define CONFIG_SYS_MAXARGS              64      /* max command args */
261
262 /* Flash memory is available on the Juno board only */
263 #ifndef CONFIG_TARGET_VEXPRESS64_JUNO
264 #define CONFIG_SYS_NO_FLASH
265 #else
266 #define CONFIG_CMD_FLASH
267 #define CONFIG_SYS_FLASH_CFI            1
268 #define CONFIG_FLASH_CFI_DRIVER         1
269 #define CONFIG_SYS_FLASH_BASE           0x08000000
270 #define CONFIG_SYS_FLASH_SIZE           0x04000000 /* 64 MiB */
271 #define CONFIG_SYS_MAX_FLASH_BANKS      2
272
273 /* Timeout values in ticks */
274 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2 * CONFIG_SYS_HZ) /* Erase Timeout */
275 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2 * CONFIG_SYS_HZ) /* Write Timeout */
276
277 /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
278 #define CONFIG_SYS_MAX_FLASH_SECT       259             /* Max sectors */
279 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
280 #define CONFIG_SYS_FLASH_PROTECTION     /* The devices have real protection */
281 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* flinfo indicates empty blocks */
282
283 #endif
284
285 #endif /* __VEXPRESS_AEMV8A_H */