include/configs/xpedite520x.h

   1 /*
   2  * Copyright 2008 Extreme Engineering Solutions, Inc.
   3  * Copyright 2004-2008 Freescale Semiconductor, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * xpedite520x board configuration file
  26  */
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*
  31  * High Level Configuration Options
  32  */
  33 #define CONFIG_BOOKE            1       /* BOOKE */
  34 #define CONFIG_E500             1       /* BOOKE e500 family */
  35 #define CONFIG_MPC85xx          1       /* MPC8540/60/55/41/48 */
  36 #define CONFIG_MPC8548          1
  37 #define CONFIG_XPEDITE5200      1
  38 #define CONFIG_SYS_BOARD_NAME   "XPedite5200"
  39 #define CONFIG_SYS_FORM_PMC_XMC 1
  40 #define CONFIG_BOARD_EARLY_INIT_R       /* Call board_pre_init */
  41
  42 #ifndef CONFIG_SYS_TEXT_BASE
  43 #define CONFIG_SYS_TEXT_BASE    0xfff80000
  44 #endif
  45
  46 #define CONFIG_PCI              1       /* Enable PCI/PCIE */
  47 #define CONFIG_PCI_PNP          1       /* do pci plug-and-play */
  48 #define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
  49 #define CONFIG_PCI1             1       /* PCI controller 1 */
  50 #define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
  51 #define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
  52 #define CONFIG_FSL_LAW          1       /* Use common FSL init code */
  53
  54 /*
  55  * DDR config
  56  */
  57 #define CONFIG_FSL_DDR2
  58 #undef CONFIG_FSL_DDR_INTERACTIVE
  59 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
  60 #define CONFIG_DDR_SPD
  61 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
  62 #define SPD_EEPROM_ADDRESS              0x54
  63 #define CONFIG_NUM_DDR_CONTROLLERS      1
  64 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
  65 #define CONFIG_CHIP_SELECTS_PER_CTRL    2
  66 #define CONFIG_DDR_ECC
  67 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
  68 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
  69 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  70 #define CONFIG_VERY_BIG_RAM
  71
  72 #define CONFIG_SYS_CLK_FREQ     66666666
  73
  74 /*
  75  * These can be toggled for performance analysis, otherwise use default.
  76  */
  77 #define CONFIG_L2_CACHE                 /* toggle L2 cache */
  78 #define CONFIG_BTB                      /* toggle branch predition */
  79 #define CONFIG_ENABLE_36BIT_PHYS        1
  80
  81 /*
  82  * Base addresses -- Note these are effective addresses where the
  83  * actual resources get mapped (not physical addresses)
  84  */
  85 #define CONFIG_SYS_CCSRBAR_DEFAULT      0xff700000      /* CCSRBAR Default */
  86 #define CONFIG_SYS_CCSRBAR              0xef000000      /* relocated CCSRBAR */
  87 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
  88 #define CONFIG_SYS_IMMR         CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
  89
  90 /*
  91  * Diagnostics
  92  */
  93 #define CONFIG_SYS_ALT_MEMTEST
  94 #define CONFIG_SYS_MEMTEST_START        0x10000000
  95 #define CONFIG_SYS_MEMTEST_END          0x20000000
  96 #define CONFIG_POST                     (CONFIG_SYS_POST_MEMORY | \
  97                                          CONFIG_SYS_POST_I2C)
  98 #define I2C_ADDR_LIST                   {CONFIG_SYS_I2C_MAX1237_ADDR,   \
  99                                          CONFIG_SYS_I2C_EEPROM_ADDR,    \
 100                                          CONFIG_SYS_I2C_PCA953X_ADDR0,  \
 101                                          CONFIG_SYS_I2C_PCA953X_ADDR1,  \
 102                                          CONFIG_SYS_I2C_RTC_ADDR}
 103
 104 /*
 105  * Memory map
 106  * 0x0000_0000  0x7fff_ffff     DDR                     2G Cacheable
 107  * 0x8000_0000  0xbfff_ffff     PCI1 Mem                1G non-cacheable
 108  * 0xe000_0000  0xe7ff_ffff     SRAM/SSRAM/L1 Cache     128M non-cacheable
 109  * 0xe800_0000  0xe87f_ffff     PCI1 IO                 8M non-cacheable
 110  * 0xef00_0000  0xef0f_ffff     CCSR/IMMR               1M non-cacheable
 111  * 0xef80_0000  0xef8f_ffff     NAND Flash              1M non-cacheable
 112  * 0xf800_0000  0xfbff_ffff     NOR Flash 2             64M non-cacheable
 113  * 0xfc00_0000  0xffff_ffff     NOR Flash 1             64M non-cacheable
 114  */
 115
 116 #define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_8 | LCRR_EADC_3)
 117
 118 /*
 119  * NAND flash configuration
 120  */
 121 #define CONFIG_SYS_NAND_BASE            0xef800000
 122 #define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
 123 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 124 #define CONFIG_NAND_ACTL
 125 #define CONFIG_SYS_NAND_ACTL_CLE        (1 << 3)        /* ADDR3 is CLE */
 126 #define CONFIG_SYS_NAND_ACTL_ALE        (1 << 4)        /* ADDR4 is ALE */
 127 #define CONFIG_SYS_NAND_ACTL_NCE        (0)             /* NCE not controlled by ADDR */
 128 #define CONFIG_SYS_NAND_ACTL_DELAY      25
 129
 130 /*
 131  * NOR flash configuration
 132  */
 133 #define CONFIG_SYS_FLASH_BASE           0xfc000000
 134 #define CONFIG_SYS_FLASH_BASE2          0xf8000000
 135 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
 136 #define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
 137 #define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
 138 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
 139 #define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
 140 #define CONFIG_FLASH_CFI_DRIVER
 141 #define CONFIG_SYS_FLASH_CFI
 142 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 143 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
 144                                                   {0xfbf40000, 0xc0000} }
 145 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 146
 147 /*
 148  * Chip select configuration
 149  */
 150 /* NOR Flash 0 on CS0 */
 151 #define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
 152                                  BR_PS_16               | \
 153                                  BR_V)
 154 #define CONFIG_SYS_OR0_PRELIM   (OR_AM_64MB             | \
 155                                  OR_GPCM_ACS_DIV4       | \
 156                                  OR_GPCM_SCY_8)
 157
 158 /* NOR Flash 1 on CS1 */
 159 #define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
 160                                  BR_PS_16               | \
 161                                  BR_V)
 162 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
 163
 164 /* NAND flash on CS2 */
 165 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
 166                                  BR_PS_8                | \
 167                                  BR_V)
 168
 169 /* NAND flash on CS2 */
 170 #define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB            | \
 171                                  OR_GPCM_BCTLD          | \
 172                                  OR_GPCM_CSNT           | \
 173                                  OR_GPCM_ACS_DIV4       | \
 174                                  OR_GPCM_SCY_4          | \
 175                                  OR_GPCM_TRLX           | \
 176                                  OR_GPCM_EHTR)
 177
 178 /* NAND flash on CS3 */
 179 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
 180                                  BR_PS_8                | \
 181                                  BR_V)
 182 #define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
 183
 184 /*
 185  * Use L1 as initial stack
 186  */
 187 #define CONFIG_SYS_INIT_RAM_LOCK        1
 188 #define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
 189 #define CONFIG_SYS_INIT_RAM_SIZE                0x4000
 190
 191 #define CONFIG_SYS_GBL_DATA_SIZE        128             /* num bytes initial data */
 192 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
 193 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 194
 195 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
 196 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
 197
 198 /*
 199  * Serial Port
 200  */
 201 #define CONFIG_CONS_INDEX               1
 202 #define CONFIG_SYS_NS16550
 203 #define CONFIG_SYS_NS16550_SERIAL
 204 #define CONFIG_SYS_NS16550_REG_SIZE     1
 205 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 206 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
 207 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
 208 #define CONFIG_SYS_BAUDRATE_TABLE       \
 209         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
 210 #define CONFIG_BAUDRATE                 115200
 211 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
 212 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
 213
 214 /*
 215  * Use the HUSH parser
 216  */
 217 #define CONFIG_SYS_HUSH_PARSER
 218 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 219
 220 /*
 221  * Pass open firmware flat tree
 222  */
 223 #define CONFIG_OF_LIBFDT                1
 224 #define CONFIG_OF_BOARD_SETUP           1
 225 #define CONFIG_OF_STDOUT_VIA_ALIAS      1
 226
 227 /*
 228  * I2C
 229  */
 230 #define CONFIG_FSL_I2C                          /* Use FSL common I2C driver */
 231 #define CONFIG_HARD_I2C                         /* I2C with hardware support */
 232 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed and slave address */
 233 #define CONFIG_SYS_I2C_SLAVE            0x7F
 234 #define CONFIG_SYS_I2C_OFFSET           0x3000
 235 #define CONFIG_SYS_I2C2_OFFSET          0x3100
 236 #define CONFIG_I2C_MULTI_BUS
 237
 238 /* I2C EEPROM */
 239 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50
 240 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 241 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
 242 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
 243
 244 /* I2C RTC */
 245 #define CONFIG_RTC_M41T11                       1
 246 #define CONFIG_SYS_I2C_RTC_ADDR                 0x68
 247 #define CONFIG_SYS_M41T11_BASE_YEAR             2000
 248
 249 /* GPIO */
 250 #define CONFIG_PCA953X
 251 #define CONFIG_SYS_I2C_PCA953X_ADDR0            0x18
 252 #define CONFIG_SYS_I2C_PCA953X_ADDR1            0x19
 253 #define CONFIG_SYS_I2C_PCA953X_ADDR             CONFIG_SYS_I2C_PCA953X_ADDR0
 254
 255 /* PCA957 @ 0x18 */
 256 #define CONFIG_SYS_PCA953X_BRD_CFG0             0x01
 257 #define CONFIG_SYS_PCA953X_BRD_CFG1             0x02
 258 #define CONFIG_SYS_PCA953X_BRD_CFG2             0x04
 259 #define CONFIG_SYS_PCA953X_XMC_ROOT0            0x08
 260 #define CONFIG_SYS_PCA953X_FLASH_PASS_CS        0x10
 261 #define CONFIG_SYS_PCA953X_NVM_WP               0x20
 262 #define CONFIG_SYS_PCA953X_MONARCH              0x40
 263 #define CONFIG_SYS_PCA953X_EREADY               0x80
 264
 265 /* PCA957 @ 0x19 */
 266 #define CONFIG_SYS_PCA953X_P14_IO0              0x01
 267 #define CONFIG_SYS_PCA953X_P14_IO1              0x02
 268 #define CONFIG_SYS_PCA953X_P14_IO2              0x04
 269 #define CONFIG_SYS_PCA953X_P14_IO3              0x08
 270 #define CONFIG_SYS_PCA953X_P14_IO4              0x10
 271 #define CONFIG_SYS_PCA953X_P14_IO5              0x20
 272 #define CONFIG_SYS_PCA953X_P14_IO6              0x40
 273 #define CONFIG_SYS_PCA953X_P14_IO7              0x80
 274
 275 /* 12-bit ADC used to measure CPU diode */
 276 #define CONFIG_SYS_I2C_MAX1237_ADDR             0x34
 277
 278 /*
 279  * General PCI
 280  * Memory space is mapped 1-1, but I/O space must start from 0.
 281  */
 282 #define CONFIG_SYS_PCI1_MEM_BUS         0x80000000
 283 #define CONFIG_SYS_PCI1_MEM_PHYS        CONFIG_SYS_PCI1_MEM_BUS
 284 #define CONFIG_SYS_PCI1_MEM_SIZE        0x40000000      /* 1G */
 285 #define CONFIG_SYS_PCI1_IO_BUS          0x00000000
 286 #define CONFIG_SYS_PCI1_IO_PHYS         0xe8000000
 287 #define CONFIG_SYS_PCI1_IO_SIZE         0x00800000      /* 1M */
 288
 289 /*
 290  * Networking options
 291  */
 292 #define CONFIG_TSEC_ENET                /* tsec ethernet support */
 293 #define CONFIG_PHY_GIGE         1       /* Include GbE speed/duplex detection */
 294 #define CONFIG_NET_MULTI        1
 295 #define CONFIG_MII              1       /* MII PHY management */
 296 #define CONFIG_ETHPRIME         "eTSEC1"
 297
 298 #define CONFIG_TSEC1            1
 299 #define CONFIG_TSEC1_NAME       "eTSEC1"
 300 #define TSEC1_FLAGS             TSEC_GIGABIT
 301 #define TSEC1_PHY_ADDR          1
 302 #define TSEC1_PHYIDX            0
 303 #define CONFIG_HAS_ETH0
 304
 305 #define CONFIG_TSEC2            1
 306 #define CONFIG_TSEC2_NAME       "eTSEC2"
 307 #define TSEC2_FLAGS             TSEC_GIGABIT
 308 #define TSEC2_PHY_ADDR          2
 309 #define TSEC2_PHYIDX            0
 310 #define CONFIG_HAS_ETH1
 311
 312 #define CONFIG_TSEC3    1
 313 #define CONFIG_TSEC3_NAME       "eTSEC3"
 314 #define TSEC3_FLAGS             TSEC_GIGABIT
 315 #define TSEC3_PHY_ADDR          3
 316 #define TSEC3_PHYIDX            0
 317 #define CONFIG_HAS_ETH2
 318
 319 #define CONFIG_TSEC4    1
 320 #define CONFIG_TSEC4_NAME       "eTSEC4"
 321 #define TSEC4_FLAGS             TSEC_GIGABIT
 322 #define TSEC4_PHY_ADDR          4
 323 #define TSEC4_PHYIDX            0
 324 #define CONFIG_HAS_ETH3
 325
 326 /*
 327  * BOOTP options
 328  */
 329 #define CONFIG_BOOTP_BOOTFILESIZE
 330 #define CONFIG_BOOTP_BOOTPATH
 331 #define CONFIG_BOOTP_GATEWAY
 332
 333 /*
 334  * Command configuration.
 335  */
 336 #include <config_cmd_default.h>
 337
 338 #define CONFIG_CMD_ASKENV
 339 #define CONFIG_CMD_DATE
 340 #define CONFIG_CMD_DHCP
 341 #define CONFIG_CMD_EEPROM
 342 #define CONFIG_CMD_ELF
 343 #define CONFIG_CMD_SAVEENV
 344 #define CONFIG_CMD_FLASH
 345 #define CONFIG_CMD_I2C
 346 #define CONFIG_CMD_JFFS2
 347 #define CONFIG_CMD_MII
 348 #define CONFIG_CMD_NAND
 349 #define CONFIG_CMD_NET
 350 #define CONFIG_CMD_PCA953X
 351 #define CONFIG_CMD_PCA953X_INFO
 352 #define CONFIG_CMD_PCI
 353 #define CONFIG_CMD_PCI_ENUM
 354 #define CONFIG_CMD_PING
 355 #define CONFIG_CMD_SNTP
 356 #define CONFIG_CMD_REGINFO
 357
 358 /*
 359  * Miscellaneous configurable options
 360  */
 361 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 362 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 363 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt */
 364 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 365 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 366 #define CONFIG_SYS_MAXARGS      16              /* max number of command args */
 367 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 368 #define CONFIG_SYS_HZ           1000            /* decrementer freq: 1ms ticks */
 369 #define CONFIG_CMDLINE_EDITING  1               /* add command line history     */
 370 #define CONFIG_AUTO_COMPLETE    1               /* add autocompletion support */
 371 #define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
 372 #define CONFIG_BOOTDELAY        3               /* -1 disables auto-boot */
 373 #define CONFIG_PANIC_HANG                       /* do not reset board on panic */
 374 #define CONFIG_PREBOOT                          /* enable preboot variable */
 375 #define CONFIG_FIT              1
 376 #define CONFIG_FIT_VERBOSE      1
 377 #define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
 378 #define CONFIG_INTERRUPTS               /* enable pci, srio, ddr interrupts */
 379
 380 /*
 381  * For booting Linux, the board info and command line data
 382  * have to be in the first 16 MB of memory, since this is
 383  * the maximum mapped by the Linux kernel during initialization.
 384  */
 385 #define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
 386 #define CONFIG_SYS_BOOTM_LEN    (16 << 20)      /* Increase max gunzip size */
 387
 388 /*
 389  * Environment Configuration
 390  */
 391 #define CONFIG_ENV_IS_IN_FLASH  1
 392 #define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
 393 #define CONFIG_ENV_SIZE         0x8000
 394 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
 395
 396 /*
 397  * Flash memory map:
 398  * fff80000 - ffffffff     Pri U-Boot (512 KB)
 399  * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
 400  * fff00000 - fff3ffff     Pri FDT (256KB)
 401  * fef00000 - ffefffff     Pri OS image (16MB)
 402  * fc000000 - feefffff     Pri OS Use/Filesystem (47MB)
 403  *
 404  * fbf80000 - fbffffff     Sec U-Boot (512 KB)
 405  * fbf40000 - fbf7ffff     Sec U-Boot Environment (256 KB)
 406  * fbf00000 - fbf3ffff     Sec FDT (256KB)
 407  * faf00000 - fbefffff     Sec OS image (16MB)
 408  * f8000000 - faefffff     Sec OS Use/Filesystem (47MB)
 409  */
 410 #define CONFIG_UBOOT1_ENV_ADDR  MK_STR(0xfff80000)
 411 #define CONFIG_UBOOT2_ENV_ADDR  MK_STR(0xfbf80000)
 412 #define CONFIG_FDT1_ENV_ADDR    MK_STR(0xfff00000)
 413 #define CONFIG_FDT2_ENV_ADDR    MK_STR(0xfbf00000)
 414 #define CONFIG_OS1_ENV_ADDR     MK_STR(0xfef00000)
 415 #define CONFIG_OS2_ENV_ADDR     MK_STR(0xfaf00000)
 416
 417 #define CONFIG_PROG_UBOOT1                                              \
 418         "$download_cmd $loadaddr $ubootfile; "                          \
 419         "if test $? -eq 0; then "                                       \
 420                 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
 421                 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
 422                 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
 423                 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
 424                 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
 425                 "if test $? -ne 0; then "                               \
 426                         "echo PROGRAM FAILED; "                         \
 427                 "else; "                                                \
 428                         "echo PROGRAM SUCCEEDED; "                      \
 429                 "fi; "                                                  \
 430         "else; "                                                        \
 431                 "echo DOWNLOAD FAILED; "                                \
 432         "fi;"
 433
 434 #define CONFIG_PROG_UBOOT2                                              \
 435         "$download_cmd $loadaddr $ubootfile; "                          \
 436         "if test $? -eq 0; then "                                       \
 437                 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
 438                 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
 439                 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
 440                 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
 441                 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
 442                 "if test $? -ne 0; then "                               \
 443                         "echo PROGRAM FAILED; "                         \
 444                 "else; "                                                \
 445                         "echo PROGRAM SUCCEEDED; "                      \
 446                 "fi; "                                                  \
 447         "else; "                                                        \
 448                 "echo DOWNLOAD FAILED; "                                \
 449         "fi;"
 450
 451 #define CONFIG_BOOT_OS_NET                                              \
 452         "$download_cmd $osaddr $osfile; "                               \
 453         "if test $? -eq 0; then "                                       \
 454                 "if test -n $fdtaddr; then "                            \
 455                         "$download_cmd $fdtaddr $fdtfile; "             \
 456                         "if test $? -eq 0; then "                       \
 457                                 "bootm $osaddr - $fdtaddr; "            \
 458                         "else; "                                        \
 459                                 "echo FDT DOWNLOAD FAILED; "            \
 460                         "fi; "                                          \
 461                 "else; "                                                \
 462                         "bootm $osaddr; "                               \
 463                 "fi; "                                                  \
 464         "else; "                                                        \
 465                 "echo OS DOWNLOAD FAILED; "                             \
 466         "fi;"
 467
 468 #define CONFIG_PROG_OS1                                                 \
 469         "$download_cmd $osaddr $osfile; "                               \
 470         "if test $? -eq 0; then "                                       \
 471                 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
 472                 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
 473                 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
 474                 "if test $? -ne 0; then "                               \
 475                         "echo OS PROGRAM FAILED; "                      \
 476                 "else; "                                                \
 477                         "echo OS PROGRAM SUCCEEDED; "                   \
 478                 "fi; "                                                  \
 479         "else; "                                                        \
 480                 "echo OS DOWNLOAD FAILED; "                             \
 481         "fi;"
 482
 483 #define CONFIG_PROG_OS2                                                 \
 484         "$download_cmd $osaddr $osfile; "                               \
 485         "if test $? -eq 0; then "                                       \
 486                 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
 487                 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
 488                 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
 489                 "if test $? -ne 0; then "                               \
 490                         "echo OS PROGRAM FAILED; "                      \
 491                 "else; "                                                \
 492                         "echo OS PROGRAM SUCCEEDED; "                   \
 493                 "fi; "                                                  \
 494         "else; "                                                        \
 495                 "echo OS DOWNLOAD FAILED; "                             \
 496         "fi;"
 497
 498 #define CONFIG_PROG_FDT1                                                \
 499         "$download_cmd $fdtaddr $fdtfile; "                             \
 500         "if test $? -eq 0; then "                                       \
 501                 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
 502                 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
 503                 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
 504                 "if test $? -ne 0; then "                               \
 505                         "echo FDT PROGRAM FAILED; "                     \
 506                 "else; "                                                \
 507                         "echo FDT PROGRAM SUCCEEDED; "                  \
 508                 "fi; "                                                  \
 509         "else; "                                                        \
 510                 "echo FDT DOWNLOAD FAILED; "                            \
 511         "fi;"
 512
 513 #define CONFIG_PROG_FDT2                                                \
 514         "$download_cmd $fdtaddr $fdtfile; "                             \
 515         "if test $? -eq 0; then "                                       \
 516                 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
 517                 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
 518                 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
 519                 "if test $? -ne 0; then "                               \
 520                         "echo FDT PROGRAM FAILED; "                     \
 521                 "else; "                                                \
 522                         "echo FDT PROGRAM SUCCEEDED; "                  \
 523                 "fi; "                                                  \
 524         "else; "                                                        \
 525                 "echo FDT DOWNLOAD FAILED; "                            \
 526         "fi;"
 527
 528 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 529         "autoload=yes\0"                                                \
 530         "download_cmd=tftp\0"                                           \
 531         "console_args=console=ttyS0,115200\0"                           \
 532         "root_args=root=/dev/nfs rw\0"                                  \
 533         "misc_args=ip=on\0"                                             \
 534         "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
 535         "bootfile=/home/user/file\0"                                    \
 536         "osfile=/home/user/board.uImage\0"                              \
 537         "fdtfile=/home/user/board.dtb\0"                                \
 538         "ubootfile=/home/user/u-boot.bin\0"                             \
 539         "fdtaddr=c00000\0"                                              \
 540         "osaddr=0x1000000\0"                                            \
 541         "loadaddr=0x1000000\0"                                          \
 542         "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
 543         "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
 544         "prog_os1="CONFIG_PROG_OS1"\0"                                  \
 545         "prog_os2="CONFIG_PROG_OS2"\0"                                  \
 546         "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
 547         "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
 548         "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
 549         "bootcmd_flash1=run set_bootargs; "                             \
 550                 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
 551         "bootcmd_flash2=run set_bootargs; "                             \
 552                 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
 553         "bootcmd=run bootcmd_flash1\0"
 554 #endif  /* __CONFIG_H */