Introduce generic TPM support in u-boot

[karo-tx-uboot.git] / README

diff --git a/README b/README
index caebc226d7e9b0d03c214e85dc007f43870a741e..3ddec77980a896984fefdde712ba057d658d970a 100644 (file)
--- a/README
+++ b/README
@@ -1027,6 +1027,12 @@ The following options need to be configured:
                        Define this to use i/o functions instead of macros
                        (some hardware wont work with macros)
 
+               CONFIG_DRIVER_TI_EMAC
+               Support for davinci emac
+
+                       CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
+                       Define this if you have more then 3 PHYs.
+
                CONFIG_FTGMAC100
                Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
 
@@ -1066,6 +1072,16 @@ The following options need to be configured:
                        CONFIG_SH_ETHER_CACHE_WRITEBACK
                        If this option is set, the driver enables cache flush.
 
+- TPM Support:
+               CONFIG_GENERIC_LPC_TPM
+               Support for generic parallel port TPM devices. Only one device
+               per system is supported at this time.
+
+                       CONFIG_TPM_TIS_BASE_ADDRESS
+                       Base address where the generic TPM device is mapped
+                       to. Contemporary x86 systems usually map it at
+                       0xfed40000.
+
 - USB Support:
                At the moment only the UHCI host controller is
                supported (PIP405, MIP405, MPC5200); define
@@ -1904,7 +1920,7 @@ The following options need to be configured:
                CONFIG_MXC_SPI
 
                Enables the driver for the SPI controllers on i.MX and MXC
-               SoCs. Currently only i.MX31 is supported.
+               SoCs. Currently i.MX31/35/51 are supported.
 
 - FPGA Support: CONFIG_FPGA
 
@@ -3268,6 +3284,44 @@ Low Level (hardware related) configuration options:
                be used if available. These functions may be faster under some
                conditions but may increase the binary size.
 
+Freescale QE/FMAN Firmware Support:
+-----------------------------------
+
+The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
+loading of "firmware", which is encoded in the QE firmware binary format.
+This firmware often needs to be loaded during U-Boot booting, so macros
+are used to identify the storage device (NOR flash, SPI, etc) and the address
+within that device.
+
+- CONFIG_SYS_QE_FMAN_FW_ADDR
+       The address in the storage device where the firmware is located.  The
+       meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
+       is also specified.
+
+- CONFIG_SYS_QE_FMAN_FW_LENGTH
+       The maximum possible size of the firmware.  The firmware binary format
+       has a field that specifies the actual size of the firmware, but it
+       might not be possible to read any part of the firmware unless some
+       local storage is allocated to hold the entire firmware first.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_NOR
+       Specifies that QE/FMAN firmware is located in NOR flash, mapped as
+       normal addressable memory via the LBC.  CONFIG_SYS_FMAN_FW_ADDR is the
+       virtual address in NOR flash.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_NAND
+       Specifies that QE/FMAN firmware is located in NAND flash.
+       CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_MMC
+       Specifies that QE/FMAN firmware is located on the primary SD/MMC
+       device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH
+       Specifies that QE/FMAN firmware is located on the primary SPI
+       device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+
+
 Building the Software:
 ======================