ARM: UniPhier: add I/O pin settings for xHCI on PH1-Pro4

[karo-tx-uboot.git] / README

diff --git a/README b/README
index a28ff133ee057c17af79a397e44325328f82dedf..7189f1a5da099322839f54e9e445023f14051e5d 100644 (file)
--- a/README
+++ b/README
@@ -1257,6 +1257,9 @@ The following options need to be configured:
                SoC, then define this variable and provide board
                specific code for the "hw_watchdog_reset" function.
 
+               CONFIG_AT91_HW_WDT_TIMEOUT
+               specify the timeout in seconds. default 2 seconds.
+
 - U-Boot Version:
                CONFIG_VERSION_VARIABLE
                If this variable is defined, an environment variable
@@ -2207,6 +2210,17 @@ CBFS (Coreboot Filesystem) support
                requests. Increasing this will allow U-Boot to accept offers
                from a BOOTP client in networks with unusually high latency.
 
+- BOOTP Random transaction ID:
+               CONFIG_BOOTP_RANDOM_ID
+
+               The standard algorithm to generate a DHCP/BOOTP transaction ID
+               by using the MAC address and the current time stamp may not
+               quite unlikely produce duplicate transaction IDs from different
+               clients in the same network. This option creates a transaction
+               ID using the rand() function. Provided that the RNG has been
+               seeded well, this should guarantee unique transaction IDs
+               always.
+
 - DHCP Advanced Options:
                You can fine tune the DHCP functionality by defining
                CONFIG_BOOTP_* symbols:
@@ -3149,8 +3163,18 @@ CBFS (Coreboot Filesystem) support
                Enable the hash verify command (hash -v). This adds to code
                size a little.
 
-               CONFIG_SHA1 - support SHA1 hashing
-               CONFIG_SHA256 - support SHA256 hashing
+               CONFIG_SHA1 - This option enables support of hashing using SHA1
+               algorithm. The hash is calculated in software.
+               CONFIG_SHA256 - This option enables support of hashing using
+               SHA256 algorithm. The hash is calculated in software.
+               CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration
+               for SHA1/SHA256 hashing.
+               This affects the 'hash' command and also the
+               hash_lookup_algo() function.
+               CONFIG_SHA_PROG_HW_ACCEL - This option enables
+               hardware-acceleration for SHA1/SHA256 progressive hashing.
+               Data can be streamed in a block at a time and the hashing
+               is performed in hardware.
 
                Note: There is also a sha1sum command, which should perhaps
                be deprecated in favour of 'hash sha1'.
@@ -3444,8 +3468,10 @@ FIT uImage format:
 
                CONFIG_FIT_SIGNATURE
                This option enables signature verification of FIT uImages,
-               using a hash signed and verified using RSA. See
-               doc/uImage.FIT/signature.txt for more details.
+               using a hash signed and verified using RSA. If
+               CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
+               hashing is available using hardware, RSA library will use it.
+               See doc/uImage.FIT/signature.txt for more details.
 
                WARNING: When relying on signed FIT images with required
                signature check the legacy image format is default
@@ -4338,6 +4364,9 @@ to save the current settings.
          If defined, specified the chip address of the EEPROM device.
          The default address is zero.
 
+       - CONFIG_SYS_I2C_EEPROM_BUS:
+         If defined, specified the i2c bus of the EEPROM device.
+
        - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
          If defined, the number of bits used to address bytes in a
          single page in the EEPROM device.  A 64 byte page, for example
@@ -4913,6 +4942,9 @@ Low Level (hardware related) configuration options:
 - CONFIG_FSL_DDR_INTERACTIVE
                Enable interactive DDR debugging. See doc/README.fsl-ddr.
 
+- CONFIG_FSL_DDR_SYNC_REFRESH
+               Enable sync of refresh for multiple controllers.
+
 - CONFIG_SYS_83XX_DDR_USES_CS0
                Only for 83xx systems. If specified, then DDR should
                be configured using CS0 and CS1 instead of CS2 and CS3.