ARM: serial: Remove the IXP UART driver

[karo-tx-uboot.git] / README

diff --git a/README b/README
index 895fef37e81edc66b115fb8885c69707572b369b..8ea097d0e65e899fd2ed37f6bb5b3109776b09d2 100644 (file)
--- a/README
+++ b/README
@@ -141,7 +141,6 @@ Directory Hierarchy:
        /s3c24x0        Files specific to Samsung S3C24X0 CPUs
       /arm926ejs       Files specific to ARM 926 CPUs
       /arm1136         Files specific to ARM 1136 CPUs
-      /ixp             Files specific to Intel XScale IXP CPUs
       /pxa             Files specific to Intel XScale PXA CPUs
       /sa1100          Files specific to Intel StrongARM SA1100 CPUs
     /lib               Architecture specific library files
@@ -423,6 +422,11 @@ The following options need to be configured:
                CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
                This value denotes start offset of DSP CCSR space.
 
+               CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
+               Single Source Clock is clocking mode present in some of FSL SoC's.
+               In this mode, a single differential clock is used to supply
+               clocks to the sysclock, ddrclock and usbclock.
+
 - Generic CPU options:
                CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
 
@@ -467,6 +471,15 @@ The following options need to be configured:
                Board config to use DDR3. It can be enabled for SoCs with
                Freescale DDR3 controllers.
 
+               CONFIG_SYS_FSL_PBL_PBI
+               It enables addition of RCW (Power on reset configuration) in built image.
+               Please refer doc/README.pblimage for more details
+
+               CONFIG_SYS_FSL_PBL_RCW
+               It adds PBI(pre-boot instructions) commands in u-boot build image.
+               PBI commands can be used to configure SoC before it starts the execution.
+               Please refer doc/README.pblimage for more details
+
 - Intel Monahans options:
                CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
 
@@ -2751,6 +2764,12 @@ CBFS (Coreboot Filesystem) support
                Define this option to use the Bank addr/Extended addr
                support on SPI flashes which has size > 16Mbytes.
 
+               CONFIG_SF_DUAL_FLASH            Dual flash memories
+
+               Define this option to use dual flash support where two flash
+               memories can be connected with a given cs line.
+               currently Xilinx Zynq qspi support these type of connections.
+
 - SystemACE Support:
                CONFIG_SYSTEMACE
 
@@ -3267,6 +3286,9 @@ FIT uImage format:
                Defines the size and behavior of the NAND that SPL uses
                to read U-Boot
 
+               CONFIG_SPL_NAND_BOOT
+               Add support NAND boot
+
                CONFIG_SYS_NAND_U_BOOT_OFFS
                Location in NAND to read U-Boot from