]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - README
pxe: prepend fdtdir to DTB name irrespective of source
[karo-tx-uboot.git] / README
diff --git a/README b/README
index 355e8988236fa677301fa82e57f115fc2d4962b6..f51f17ec693f2ae01387df144c64361d9710b7a6 100644 (file)
--- a/README
+++ b/README
@@ -497,6 +497,11 @@ The following options need to be configured:
                same as CONFIG_SYS_DDR_SDRAM_BASE for  all Power SoCs. But
                it could be different for ARM SoCs.
 
+               CONFIG_SYS_FSL_DDR_INTLV_256B
+               DDR controller interleaving on 256-byte. This is a special
+               interleaving mode, handled by Dickens for Freescale layerscape
+               SoCs with ARM core.
+
 - Intel Monahans options:
                CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO