Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

[karo-tx-uboot.git] / arch / arm / cpu / arm720t / start.S

diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 43bd6edd2834d4d13e87558022898fd9c8e1322d..a396ebcb715ebc121d8b4e13c7b28fecc2ea2675 100644 (file)
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -85,7 +85,7 @@ _pad:                 .word 0x12345678 /* now 16*4=64 */
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
        .word   CONFIG_SPL_TEXT_BASE
 #else
        .word   CONFIG_SYS_TEXT_BASE
@@ -151,85 +151,6 @@ reset:
 
 /*------------------------------------------------------------------------------*/
 
-/*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
- */
-       .globl  relocate_code
-relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
-
-       adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     relocate_done           /* skip relocation */
-       mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
-       add     r2, r0, r3              /* r2 <- source end address         */
-
-copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
-       cmp     r0, r2                  /* until source end address [r2]    */
-       blo     copy_loop
-
-#ifndef CONFIG_SPL_BUILD
-       /*
-        * fix .rel.dyn relocations
-        */
-       ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
-       ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
-       add     r10, r10, r0            /* r10 <- sym table in FLASH */
-       ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
-       add     r2, r2, r0              /* r2 <- rel dyn start in FLASH */
-       ldr     r3, _rel_dyn_end_ofs    /* r3 <- rel dyn end ofs */
-       add     r3, r3, r0              /* r3 <- rel dyn end in FLASH */
-fixloop:
-       ldr     r0, [r2]                /* r0 <- location to fix up, IN FLASH! */
-       add     r0, r0, r9              /* r0 <- location to fix up in RAM */
-       ldr     r1, [r2, #4]
-       and     r7, r1, #0xff
-       cmp     r7, #23                 /* relative fixup? */
-       beq     fixrel
-       cmp     r7, #2                  /* absolute fixup? */
-       beq     fixabs
-       /* ignore unknown type of fixup */
-       b       fixnext
-fixabs:
-       /* absolute fix: set location to (offset) symbol value */
-       mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
-       add     r1, r10, r1             /* r1 <- address of symbol in table */
-       ldr     r1, [r1, #4]            /* r1 <- symbol value */
-       add     r1, r1, r9              /* r1 <- relocated sym addr */
-       b       fixnext
-fixrel:
-       /* relative fix: increase location by offset */
-       ldr     r1, [r0]
-       add     r1, r1, r9
-fixnext:
-       str     r1, [r0]
-       add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
-       cmp     r2, r3
-       blo     fixloop
-#endif
-
-relocate_done:
-
-       mov     pc, lr
-
-_rel_dyn_start_ofs:
-       .word __rel_dyn_start - _start
-_rel_dyn_end_ofs:
-       .word __rel_dyn_end - _start
-_dynsym_start_ofs:
-       .word __dynsym_start - _start
-
        .globl  c_runtime_cpu_setup
 c_runtime_cpu_setup:
 
@@ -246,9 +167,9 @@ c_runtime_cpu_setup:
  *************************************************************************
  */
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 cpu_init_crit:
 
-#if !defined(CONFIG_TEGRA)
        mov     ip, lr
        /*
         * before relocating, we have to setup RAM timing
@@ -257,9 +178,9 @@ cpu_init_crit:
         */
        bl      lowlevel_init
        mov     lr, ip
-#endif
 
        mov     pc, lr
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 
 
 #ifndef CONFIG_SPL_BUILD