]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - arch/arm/cpu/arm926ejs/at91/clock.c
Merge branch 'master' of git://git.denx.de/u-boot-usb
[karo-tx-uboot.git] / arch / arm / cpu / arm926ejs / at91 / clock.c
index f825388ae994f3dde7dca9fd1bb4cbe67beac897..f363982d0350d85dea3eef38be960de5b65a2b6b 100644 (file)
@@ -5,10 +5,7 @@
  * Copyright (C) 2005 Ivan Kokshaysky
  * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -156,7 +153,7 @@ int at91_clock_init(unsigned long main_clock)
         */
        mckr = readl(&pmc->mckr);
 #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \
-               || defined(CONFIG_AT91SAM9X5)
+               || defined(CONFIG_AT91SAM9N12) || defined(CONFIG_AT91SAM9X5)
        /* plla divisor by 2 */
        gd->arch.plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
 #endif
@@ -171,7 +168,7 @@ int at91_clock_init(unsigned long main_clock)
        if (mckr & AT91_PMC_MCKR_MDIV_MASK)
                freq /= 2;                      /* processor clock division */
 #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \
-               || defined(CONFIG_AT91SAM9X5)
+               || defined(CONFIG_AT91SAM9N12) || defined(CONFIG_AT91SAM9X5)
        /* mdiv <==> divisor
         *  0   <==>   1
         *  1   <==>   2
@@ -190,3 +187,63 @@ int at91_clock_init(unsigned long main_clock)
 
        return 0;
 }
+
+#if !defined(AT91_PLL_LOCK_TIMEOUT)
+#define AT91_PLL_LOCK_TIMEOUT  1000000
+#endif
+
+void at91_plla_init(u32 pllar)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+       int timeout = AT91_PLL_LOCK_TIMEOUT;
+
+       writel(pllar, &pmc->pllar);
+       while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY))) {
+               timeout--;
+               if (timeout == 0)
+                       break;
+       }
+}
+void at91_pllb_init(u32 pllbr)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+       int timeout = AT91_PLL_LOCK_TIMEOUT;
+
+       writel(pllbr, &pmc->pllbr);
+       while (!(readl(&pmc->sr) & (AT91_PMC_LOCKB | AT91_PMC_MCKRDY))) {
+               timeout--;
+               if (timeout == 0)
+                       break;
+       }
+}
+
+void at91_mck_init(u32 mckr)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+       int timeout = AT91_PLL_LOCK_TIMEOUT;
+       u32 tmp;
+
+       tmp = readl(&pmc->mckr);
+       tmp &= ~(AT91_PMC_MCKR_PRES_MASK |
+                AT91_PMC_MCKR_MDIV_MASK |
+                AT91_PMC_MCKR_PLLADIV_MASK |
+                AT91_PMC_MCKR_CSS_MASK);
+       tmp |= mckr & (AT91_PMC_MCKR_PRES_MASK |
+                      AT91_PMC_MCKR_MDIV_MASK |
+                      AT91_PMC_MCKR_PLLADIV_MASK |
+                      AT91_PMC_MCKR_CSS_MASK);
+       writel(tmp, &pmc->mckr);
+
+       while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) {
+               timeout--;
+               if (timeout == 0)
+                       break;
+       }
+}
+
+void at91_periph_clk_enable(int id)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+       writel(1 << id, &pmc->pcer);
+}