debug("SPL: Setting mx23 VDDMEM\n");
/* We must wait before and after disabling the current limiter! */
debug("SPL: Setting mx23 VDDMEM\n");
/* We must wait before and after disabling the current limiter! */
clrbits_le32(&power_regs->hw_power_vddmemctrl,
POWER_VDDMEMCTRL_ENABLE_ILIMIT);
clrbits_le32(&power_regs->hw_power_vddmemctrl,
POWER_VDDMEMCTRL_ENABLE_ILIMIT);
}
/* Adjust EMI port priority. */
clrsetbits_le32(0x80020000, 0x1f << 16, 0x2);
}
/* Adjust EMI port priority. */
clrsetbits_le32(0x80020000, 0x1f << 16, 0x2);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 11);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 11);