Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / at91 / sama5d3_devices.c

diff --git a/arch/arm/cpu/armv7/at91/sama5d3_devices.c b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
index 4a3fca56a1a94409abd7bf4d2e2461af271fbf82..78ecfc882a874dc4fc19567b6c0e8be661783942 100644 (file)
--- a/arch/arm/cpu/armv7/at91/sama5d3_devices.c
+++ b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
@@ -15,7 +15,7 @@
 
 unsigned int has_emac()
 {
-       return cpu_is_sama5d31() || cpu_is_sama5d35();
+       return cpu_is_sama5d31() || cpu_is_sama5d35() || cpu_is_sama5d36();
 }
 
 unsigned int has_gmac()
@@ -42,6 +42,8 @@ char *get_cpu_name()
                        return "SAMA5D34";
                case ARCH_EXID_SAMA5D35:
                        return "SAMA5D35";
+               case ARCH_EXID_SAMA5D36:
+                       return "SAMA5D36";
                default:
                        return "Unknown CPU type";
                }
@@ -82,7 +84,7 @@ void at91_seriald_hw_init(void)
        at91_set_a_periph(AT91_PIO_PORTB, 30, 0);       /* DRXD */
 
        /* Enable clock */
-       at91_periph_clk_enable(ATMEL_ID_SYS);
+       at91_periph_clk_enable(ATMEL_ID_DBGU);
 }
 
 #if defined(CONFIG_ATMEL_SPI)
@@ -144,6 +146,30 @@ void at91_macb_hw_init(void)
        /* Enable clock */
        at91_periph_clk_enable(ATMEL_ID_EMAC);
 }
+
+void at91_gmac_hw_init(void)
+{
+       at91_set_a_periph(AT91_PIO_PORTB, 0, 0);        /* GTX0 */
+       at91_set_a_periph(AT91_PIO_PORTB, 1, 0);        /* GTX1 */
+       at91_set_a_periph(AT91_PIO_PORTB, 2, 0);        /* GTX2 */
+       at91_set_a_periph(AT91_PIO_PORTB, 3, 0);        /* GTX3 */
+       at91_set_a_periph(AT91_PIO_PORTB, 4, 0);        /* GRX0 */
+       at91_set_a_periph(AT91_PIO_PORTB, 5, 0);        /* GRX1 */
+       at91_set_a_periph(AT91_PIO_PORTB, 6, 0);        /* GRX2 */
+       at91_set_a_periph(AT91_PIO_PORTB, 7, 0);        /* GRX3 */
+       at91_set_a_periph(AT91_PIO_PORTB, 8, 0);        /* GTXCK */
+       at91_set_a_periph(AT91_PIO_PORTB, 9, 0);        /* GTXEN */
+
+       at91_set_a_periph(AT91_PIO_PORTB, 11, 0);       /* GRXCK */
+       at91_set_a_periph(AT91_PIO_PORTB, 13, 0);       /* GRXER */
+
+       at91_set_a_periph(AT91_PIO_PORTB, 16, 0);       /* GMDC */
+       at91_set_a_periph(AT91_PIO_PORTB, 17, 0);       /* GMDIO */
+       at91_set_a_periph(AT91_PIO_PORTB, 18, 0);       /* G125CK */
+
+       /* Enable clock */
+       at91_periph_clk_enable(ATMEL_ID_GMAC);
+}
 #endif
 
 #ifdef CONFIG_LCD
@@ -178,3 +204,15 @@ void at91_lcd_hw_init(void)
        at91_periph_clk_enable(ATMEL_ID_LCDC);
 }
 #endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+void at91_udp_hw_init(void)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+       /* Enable UPLL clock */
+       writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr);
+       /* Enable UDPHS clock */
+       at91_periph_clk_enable(ATMEL_ID_UDPHS);
+}
+#endif