Merge branch 'master' of git://git.denx.de/u-boot-usb

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / mx5 / soc.c

diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index 1533dd872258380fe04f193d84ff186e8f7b23c4..3753c14df3977c7b70459d5db2e3df0a05791f95 100644 (file)
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -4,23 +4,7 @@
  *
  * (C) Copyright 2009 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -30,6 +14,7 @@
 
 #include <asm/errno.h>
 #include <asm/io.h>
+#include <asm/imx-common/boot_mode.h>
 
 #if !(defined(CONFIG_MX51) || defined(CONFIG_MX53))
 #error "CPU_TYPE not defined"
@@ -71,8 +56,23 @@ u32 get_cpu_rev(void)
        return system_rev;
 }
 
+#ifdef CONFIG_REVISION_TAG
+u32 __weak get_board_rev(void)
+{
+       return get_cpu_rev();
+}
+#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+       /* Enable D-cache. I-cache is already enabled in start.S */
+       dcache_enable();
+}
+#endif
+
 #if defined(CONFIG_FEC_MXC)
-void imx_get_mac_from_fuse(unsigned char *mac)
+void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 {
        int i;
        struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@@ -85,33 +85,32 @@ void imx_get_mac_from_fuse(unsigned char *mac)
 }
 #endif
 
-void set_chipselect_size(int const cs_size)
+#ifdef CONFIG_MX53
+void boot_mode_apply(unsigned cfg_val)
 {
-       unsigned int reg;
-       struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
-       reg = readl(&iomuxc_regs->gpr1);
-
-       switch (cs_size) {
-       case CS0_128:
-               reg &= ~0x7;    /* CS0=128MB, CS1=0, CS2=0, CS3=0 */
-               reg |= 0x5;
-               break;
-       case CS0_64M_CS1_64M:
-               reg &= ~0x3F;   /* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */
-               reg |= 0x1B;
-               break;
-       case CS0_64M_CS1_32M_CS2_32M:
-               reg &= ~0x1FF;  /* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */
-               reg |= 0x4B;
-               break;
-       case CS0_32M_CS1_32M_CS2_32M_CS3_32M:
-               reg &= ~0xFFF;  /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */
-               reg |= 0x249;
-               break;
-       default:
-               printf("Unknown chip select size: %d\n", cs_size);
-               break;
-       }
-
-       writel(reg, &iomuxc_regs->gpr1);
+       writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr);
 }
+/*
+ * cfg_val will be used for
+ * Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
+ *
+ * If bit 28 of LPGR is set upon watchdog reset,
+ * bits[25:0] of LPGR will move to SBMR.
+ */
+const struct boot_mode soc_boot_modes[] = {
+       {"normal",      MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},
+       /* usb or serial download */
+       {"usb",         MAKE_CFGVAL(0x00, 0x00, 0x00, 0x13)},
+       {"sata",        MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)},
+       {"escpi1:0",    MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)},
+       {"escpi1:1",    MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)},
+       {"escpi1:2",    MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)},
+       {"escpi1:3",    MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)},
+       /* 4 bit bus width */
+       {"esdhc1",      MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)},
+       {"esdhc2",      MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)},
+       {"esdhc3",      MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)},
+       {"esdhc4",      MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)},
+       {NULL,          0},
+};
+#endif