karo: merge with Ka-Ro specific tree for secure boot support

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / mx5 / soc.c

diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index 978f8499ec4bec1d746582dd8c9ba92ecc5c9487..95564a8257d33fb1e3b8b6a0fa13a3cb87d33b99 100644 (file)
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -106,48 +106,6 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 
 #endif
 
-void set_chipselect_size(int const cs_size)
-{
-       unsigned int reg;
-       struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
-       reg = readl(&iomuxc_regs->gpr1);
-
-       switch (cs_size) {
-       case CS0_128:
-               reg &= ~0x7;    /* CS0=128MB, CS1=0, CS2=0, CS3=0 */
-               reg |= 0x5;
-               break;
-       case CS0_64M_CS1_64M:
-               reg &= ~0x3F;   /* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */
-               reg |= 0x1B;
-               break;
-       case CS0_64M_CS1_32M_CS2_32M:
-               reg &= ~0x1FF;  /* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */
-               reg |= 0x4B;
-               break;
-       case CS0_32M_CS1_32M_CS2_32M_CS3_32M:
-               reg &= ~0xFFF;  /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */
-               reg |= 0x249;
-               break;
-       default:
-               printf("Unknown chip select size: %d\n", cs_size);
-               break;
-       }
-
-       writel(reg, &iomuxc_regs->gpr1);
-}
-
-void cpu_cache_initialization(void)
-{
-       printf("Enabling L2 cache\n");
-       asm volatile(
-               "mrc 15, 0, r0, c1, c0, 1\n"
-               "orr r0, r0, #0x2\n"
-               "mcr 15, 0, r0, c1, c0, 1\n"
-               : : : "r0", "memory"
-               );
-}
-
 #ifdef CONFIG_MX53
 void boot_mode_apply(unsigned cfg_val)
 {