mx6: Set shared override bit in PL310 AUX_CTRL register

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / mx6 / soc.c

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index e9f69d4181a674f6c6df91044848c070185ec6ac..6309c25605a0378fea83c718be12a709a5a678e5 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -721,6 +721,14 @@ void v7_outer_cache_enable(void)
        struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
        unsigned int val;
 
+
+       /*
+        * Set bit 22 in the auxiliary control register. If this bit
+        * is cleared, PL310 treats Normal Shared Non-cacheable
+        * accesses as Cacheable no-allocate.
+        */
+       setbits_le32(&pl310->pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE);
+
 #if defined CONFIG_SOC_MX6SL
        struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
        val = readl(&iomux->gpr[11]);