Merge branch 'master' of git://git.denx.de/u-boot-arm

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / mx6 / soc.c

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 84b458c7eb0d68863c03779dfcb3bf186f149a5c..2ea8ca3bd354c8a4ca25dc2345eadd15376f7cb5 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -29,19 +29,49 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/imx-common/boot_mode.h>
+#include <stdbool.h>
+
+struct scu_regs {
+       u32     ctrl;
+       u32     config;
+       u32     status;
+       u32     invalidate;
+       u32     fpga_rev;
+};
 
 u32 get_cpu_rev(void)
 {
        struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
-       int reg = readl(&anatop->digprog);
+       u32 reg = readl(&anatop->digprog_sololite);
+       u32 type = ((reg >> 16) & 0xff);
+
+       if (type != MXC_CPU_MX6SL) {
+               reg = readl(&anatop->digprog);
+               type = ((reg >> 16) & 0xff);
+               if (type == MXC_CPU_MX6DL) {
+                       struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
+                       u32 cfg = readl(&scu->config) & 3;
+
+                       if (!cfg)
+                               type = MXC_CPU_MX6SOLO;
+               }
+       }
+       reg &= 0xff;            /* mx6 silicon revision */
+       return (type << 12) | (reg + 0x10);
+}
 
-       /* Read mx6 variant: quad, dual or solo */
-       int system_rev = (reg >> 4) & 0xFF000;
-       /* Read mx6 silicon revision */
-       system_rev |= (reg & 0xFF) + 0x10;
+#ifdef CONFIG_REVISION_TAG
+u32 __weak get_board_rev(void)
+{
+       u32 cpurev = get_cpu_rev();
+       u32 type = ((cpurev >> 12) & 0xff);
+       if (type == MXC_CPU_MX6SOLO)
+               cpurev = (MXC_CPU_MX6DL) << 12 | (cpurev & 0xFFF);
 
-       return system_rev;
+       return cpurev;
 }
+#endif
 
 void init_aips(void)
 {
@@ -104,12 +134,23 @@ void set_vddsoc(u32 mv)
        writel(reg, &anatop->reg_core);
 }
 
+static void imx_set_wdog_powerdown(bool enable)
+{
+       struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
+       struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR;
+
+       /* Write to the PDE (Power Down Enable) bit */
+       writew(enable, &wdog1->wmcr);
+       writew(enable, &wdog2->wmcr);
+}
+
 int arch_cpu_init(void)
 {
        init_aips();
 
        set_vddsoc(1200);       /* Set VDDSOC to 1.2V */
 
+       imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
        return 0;
 }
 
@@ -141,3 +182,42 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 
 }
 #endif
+
+void boot_mode_apply(unsigned cfg_val)
+{
+       unsigned reg;
+       struct src *psrc = (struct src *)SRC_BASE_ADDR;
+       writel(cfg_val, &psrc->gpr9);
+       reg = readl(&psrc->gpr10);
+       if (cfg_val)
+               reg |= 1 << 28;
+       else
+               reg &= ~(1 << 28);
+       writel(reg, &psrc->gpr10);
+}
+/*
+ * cfg_val will be used for
+ * Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
+ * After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0]
+ * to SBMR1, which will determine the boot device.
+ */
+const struct boot_mode soc_boot_modes[] = {
+       {"normal",      MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},
+       /* reserved value should start rom usb */
+       {"usb",         MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)},
+       {"sata",        MAKE_CFGVAL(0x20, 0x00, 0x00, 0x00)},
+       {"escpi1:0",    MAKE_CFGVAL(0x30, 0x00, 0x00, 0x08)},
+       {"escpi1:1",    MAKE_CFGVAL(0x30, 0x00, 0x00, 0x18)},
+       {"escpi1:2",    MAKE_CFGVAL(0x30, 0x00, 0x00, 0x28)},
+       {"escpi1:3",    MAKE_CFGVAL(0x30, 0x00, 0x00, 0x38)},
+       /* 4 bit bus width */
+       {"esdhc1",      MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)},
+       {"esdhc2",      MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
+       {"esdhc3",      MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
+       {"esdhc4",      MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
+       {NULL,          0},
+};
+
+void s_init(void)
+{
+}