Merge branch 'master' of git://git.denx.de/u-boot-arm

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / mx6 / soc.c

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index a8aad5dd0a6c8548277021ebe8f6e159dbf31b9b..2ea8ca3bd354c8a4ca25dc2345eadd15376f7cb5 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -30,6 +30,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/imx-common/boot_mode.h>
+#include <stdbool.h>
 
 struct scu_regs {
        u32     ctrl;
@@ -60,6 +61,18 @@ u32 get_cpu_rev(void)
        return (type << 12) | (reg + 0x10);
 }
 
+#ifdef CONFIG_REVISION_TAG
+u32 __weak get_board_rev(void)
+{
+       u32 cpurev = get_cpu_rev();
+       u32 type = ((cpurev >> 12) & 0xff);
+       if (type == MXC_CPU_MX6SOLO)
+               cpurev = (MXC_CPU_MX6DL) << 12 | (cpurev & 0xFFF);
+
+       return cpurev;
+}
+#endif
+
 void init_aips(void)
 {
        struct aipstz_regs *aips1, *aips2;
@@ -121,12 +134,23 @@ void set_vddsoc(u32 mv)
        writel(reg, &anatop->reg_core);
 }
 
+static void imx_set_wdog_powerdown(bool enable)
+{
+       struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
+       struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR;
+
+       /* Write to the PDE (Power Down Enable) bit */
+       writew(enable, &wdog1->wmcr);
+       writew(enable, &wdog2->wmcr);
+}
+
 int arch_cpu_init(void)
 {
        init_aips();
 
        set_vddsoc(1200);       /* Set VDDSOC to 1.2V */
 
+       imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
        return 0;
 }
 
@@ -193,3 +217,7 @@ const struct boot_mode soc_boot_modes[] = {
        {"esdhc4",      MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
        {NULL,          0},
 };
+
+void s_init(void)
+{
+}