usb: Add multiple controllers support for EHCI PCI

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / omap4 / clocks.c

diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c
index b6b3f7e195e5733b6d4cd9b0e4143bea22bdc574..12c58033d2600371c78ab8ae8de40216c1e83c55 100644 (file)
--- a/arch/arm/cpu/armv7/omap4/clocks.c
+++ b/arch/arm/cpu/armv7/omap4/clocks.c
@@ -44,9 +44,7 @@
  */
 #define printf(fmt, args...)
 #define puts(s)
-#endif
-
-#define abs(x) (((x) < 0) ? ((x)*-1) : (x))
+#endif /* !CONFIG_SPL_BUILD */
 
 struct omap4_prcm_regs *const prcm = (struct omap4_prcm_regs *)0x4A004100;
 
@@ -148,7 +146,7 @@ static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {
        {727, 14, -1, -1, 4, 7, -1, -1},        /* 19.2 MHz */
        {931, 25, -1, -1, 4, 7, -1, -1},        /* 26 MHz   */
        {931, 26, -1, -1, 4, 7, -1, -1},        /* 27 MHz   */
-       {412, 16, -1, -1, 4, 7, -1, -1}         /* 38.4 MHz */
+       {291, 11, -1, -1, 4, 7, -1, -1}         /* 38.4 MHz */
 };
 
 /* ABE M & N values with sys_clk as source */
@@ -326,6 +324,21 @@ void scale_vcores(void)
        }
 }
 
+u32 get_offset_code(u32 offset)
+{
+       u32 offset_code, step = 12660; /* 12.66 mV represented in uV */
+
+       if (omap_revision() == OMAP4430_ES1_0)
+               offset -= PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV;
+       else
+               offset -= PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV;
+
+       offset_code = (offset + step - 1) / step;
+
+       /* The code starts at 1 not 0 */
+       return ++offset_code;
+}
+
 /*
  * Enable essential clock domains, modules and
  * do some additional special settings needed
@@ -341,6 +354,7 @@ void enable_basic_clocks(void)
        };
 
        u32 *const clk_modules_hw_auto_essential[] = {
+               &prcm->cm_l3_2_gpmc_clkctrl,
                &prcm->cm_memif_emif_1_clkctrl,
                &prcm->cm_memif_emif_2_clkctrl,
                &prcm->cm_l4cfg_l4_cfg_clkctrl,
@@ -350,9 +364,6 @@ void enable_basic_clocks(void)
                &prcm->cm_l4per_gpio4_clkctrl,
                &prcm->cm_l4per_gpio5_clkctrl,
                &prcm->cm_l4per_gpio6_clkctrl,
-               &prcm->cm_l3init_usbphy_clkctrl,
-               &prcm->cm_clksel_usb_60mhz,
-               &prcm->cm_l3init_hsusbtll_clkctrl,
                0
        };
 
@@ -363,8 +374,6 @@ void enable_basic_clocks(void)
                &prcm->cm_l4per_gptimer2_clkctrl,
                &prcm->cm_wkup_wdtimer2_clkctrl,
                &prcm->cm_l4per_uart3_clkctrl,
-               &prcm->cm_l3init_fsusb_clkctrl,
-               &prcm->cm_l3init_hsusbhost_clkctrl,
                0
        };
 
@@ -401,6 +410,9 @@ void enable_basic_uboot_clocks(void)
        u32 *const clk_modules_hw_auto_essential[] = {
                &prcm->cm_l3init_hsusbotg_clkctrl,
                &prcm->cm_l3init_usbphy_clkctrl,
+               &prcm->cm_l3init_usbphy_clkctrl,
+               &prcm->cm_clksel_usb_60mhz,
+               &prcm->cm_l3init_hsusbtll_clkctrl,
                0
        };
 
@@ -410,6 +422,7 @@ void enable_basic_uboot_clocks(void)
                &prcm->cm_l4per_i2c2_clkctrl,
                &prcm->cm_l4per_i2c3_clkctrl,
                &prcm->cm_l4per_i2c4_clkctrl,
+               &prcm->cm_l3init_hsusbhost_clkctrl,
                0
        };
 
@@ -440,16 +453,10 @@ void enable_non_essential_clocks(void)
        };
 
        u32 *const clk_modules_hw_auto_non_essential[] = {
-               &prcm->cm_mpu_m3_mpu_m3_clkctrl,
-               &prcm->cm_ivahd_ivahd_clkctrl,
-               &prcm->cm_ivahd_sl2_clkctrl,
-               &prcm->cm_dsp_dsp_clkctrl,
-               &prcm->cm_l3_2_gpmc_clkctrl,
                &prcm->cm_l3instr_l3_3_clkctrl,
                &prcm->cm_l3instr_l3_instr_clkctrl,
                &prcm->cm_l3instr_intrconn_wp1_clkctrl,
                &prcm->cm_l3init_hsi_clkctrl,
-               &prcm->cm_l3init_hsusbtll_clkctrl,
                0
        };
 
@@ -489,8 +496,6 @@ void enable_non_essential_clocks(void)
                &prcm->cm_cam_fdif_clkctrl,
                &prcm->cm_dss_dss_clkctrl,
                &prcm->cm_sgx_sgx_clkctrl,
-               &prcm->cm_l3init_hsusbhost_clkctrl,
-               &prcm->cm_l3init_fsusb_clkctrl,
                0
        };