ARM: OMAP5: DRA7xx: support class 0 optimized voltages

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / omap5 / hw_data.c

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 90274a02cfdeeac70af20108ec29bb329216c446..bddcaed179798293428dd6ff48bd2dbee5833001 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -338,22 +338,32 @@ struct vcores_data omap5430_volts_es2 = {
 
 struct vcores_data dra752_volts = {
        .mpu.value      = VDD_MPU_DRA752,
+       .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU_NOM,
+       .mpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
        .mpu.addr       = TPS659038_REG_ADDR_SMPS12_MPU,
        .mpu.pmic       = &tps659038,
 
        .eve.value      = VDD_EVE_DRA752,
+       .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
+       .eve.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
        .eve.addr       = TPS659038_REG_ADDR_SMPS45_EVE,
        .eve.pmic       = &tps659038,
 
        .gpu.value      = VDD_GPU_DRA752,
+       .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU_NOM,
+       .gpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
        .gpu.addr       = TPS659038_REG_ADDR_SMPS6_GPU,
        .gpu.pmic       = &tps659038,
 
        .core.value     = VDD_CORE_DRA752,
+       .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM,
+       .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
        .core.addr      = TPS659038_REG_ADDR_SMPS7_CORE,
        .core.pmic      = &tps659038,
 
        .iva.value      = VDD_IVA_DRA752,
+       .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA_NOM,
+       .iva.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
        .iva.addr       = TPS659038_REG_ADDR_SMPS8_IVA,
        .iva.pmic       = &tps659038,
 };