Merge branch 'master' of git://git.denx.de/u-boot-usb

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / start.S

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 32658eb7a53d15437265c043809242608b56af08..fa5fad1b0c85c277303194788de66921013d6b7f 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -96,7 +96,7 @@ _image_copy_end_ofs:
 
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -155,15 +155,11 @@ reset:
        bl      cpu_init_crit
 #endif
 
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
-       ldr     r0,=0x00000000
-       bl      board_init_f
+       bl      _main
 
 /*------------------------------------------------------------------------------*/
 
+#ifndef CONFIG_SPL_BUILD
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
@@ -176,14 +172,10 @@ ENTRY(relocate_code)
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
 
-       /* Set up the stack                                                 */
-stack_setup:
-       mov     sp, r4
-
        adr     r0, _start
        cmp     r0, r6
        moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
-       beq     clear_bss               /* skip relocation */
+       beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
@@ -194,7 +186,6 @@ copy_loop:
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
-#ifndef CONFIG_SPL_BUILD
        /*
         * fix .rel.dyn relocations
         */
@@ -233,42 +224,22 @@ fixnext:
        add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
        cmp     r2, r3
        blo     fixloop
-       b       clear_bss
+
+relocate_done:
+
+       bx      lr
+
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
        .word __rel_dyn_end - _start
 _dynsym_start_ofs:
        .word __dynsym_start - _start
+ENDPROC(relocate_code)
 
-#endif /* #ifndef CONFIG_SPL_BUILD */
-
-clear_bss:
-#ifdef CONFIG_SPL_BUILD
-       /* No relocation for SPL */
-       ldr     r0, =__bss_start
-       ldr     r1, =__bss_end__
-#else
-       ldr     r0, _bss_start_ofs
-       ldr     r1, _bss_end_ofs
-       mov     r4, r6                  /* reloc addr */
-       add     r0, r0, r4
-       add     r1, r1, r4
 #endif
-       mov     r2, #0x00000000         /* clear                            */
 
-clbss_l:cmp    r0, r1                  /* clear loop... */
-       bhs     clbss_e                 /* if reached end of bss, exit */
-       str     r2, [r0]
-       add     r0, r0, #4
-       b       clbss_l
-clbss_e:
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-jump_2_ram:
+ENTRY(c_runtime_cpu_setup)
 /*
  * If I-cache is enabled invalidate it
  */
@@ -280,28 +251,16 @@ jump_2_ram:
 /*
  * Move vector table
  */
-#if !defined(CONFIG_TEGRA20)
-#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
+#if !defined(CONFIG_TEGRA)
        /* Set vector address in CP15 VBAR register */
        ldr     r0, =_start
        add     r0, r0, r9
        mcr     p15, 0, r0, c12, c0, 0  @Set VBAR
-#endif
-#endif /* !Tegra20 */
-
-       ldr     r0, _board_init_r_ofs
-       adr     r1, _start
-       add     lr, r0, r1
-       add     lr, lr, r9
-       /* setup parameters for board_init_r */
-       mov     r0, r5          /* gd_t */
-       mov     r1, r6          /* dest_addr */
-       /* jump to it ... */
-       mov     pc, lr
-
-_board_init_r_ofs:
-       .word board_init_r - _start
-ENDPROC(relocate_code)
+#endif /* !Tegra */
+
+       bx      lr
+
+ENDPROC(c_runtime_cpu_setup)
 
 /*************************************************************************
  *
@@ -350,6 +309,25 @@ ENTRY(cpu_init_cp15)
        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-cache
 #endif
        mcr     p15, 0, r0, c1, c0, 0
+
+#ifdef CONFIG_ARM_ERRATA_742230
+       mrc     p15, 0, r0, c15, c0, 1  @ read diagnostic register
+       orr     r0, r0, #1 << 4         @ set bit #4
+       mcr     p15, 0, r0, c15, c0, 1  @ write diagnostic register
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_743622
+       mrc     p15, 0, r0, c15, c0, 1  @ read diagnostic register
+       orr     r0, r0, #1 << 6         @ set bit #6
+       mcr     p15, 0, r0, c15, c0, 1  @ write diagnostic register
+#endif
+
+#ifdef CONFIG_ARM_ERRATA_751472
+       mrc     p15, 0, r0, c15, c0, 1  @ read diagnostic register
+       orr     r0, r0, #1 << 11        @ set bit #11
+       mcr     p15, 0, r0, c15, c0, 1  @ write diagnostic register
+#endif
+
        mov     pc, lr                  @ back to my caller
 ENDPROC(cpu_init_cp15)
 
@@ -369,10 +347,7 @@ ENTRY(cpu_init_crit)
         * basic memory. Go here to bump up clock rate and handle
         * wake up conditions.
         */
-       mov     ip, lr                  @ persevere link reg across call
-       bl      lowlevel_init           @ go setup pll,mux,memory
-       mov     lr, ip                  @ restore link
-       mov     pc, lr                  @ back to my caller
+       b       lowlevel_init           @ go setup pll,mux,memory
 ENDPROC(cpu_init_crit)
 #endif