ARMv7: Factor out reusable timer_wait from sunxi/psci_sun7i.S

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / sunxi / psci_sun6i.S

diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
index d4cb51e044d4874f23520b2a88147db5f1c4fe10..4ff46e4fc0b9c1a9020d605ac6f7dbcd407b6439 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
@@ -18,6 +18,8 @@
  */
 
 #include <config.h>
+
+#include <asm/arch-armv7/generictimer.h>
 #include <asm/gic.h>
 #include <asm/macro.h>
 #include <asm/psci.h>
@@ -43,26 +45,6 @@
 #define        GICD_BASE               0x1c81000
 #define        GICC_BASE               0x1c82000
 
-.macro timer_wait      reg, ticks
-       @ Program CNTP_TVAL
-       movw    \reg, #(\ticks & 0xffff)
-       movt    \reg, #(\ticks >> 16)
-       mcr     p15, 0, \reg, c14, c2, 0
-       isb
-       @ Enable physical timer, mask interrupt
-       mov     \reg, #3
-       mcr     p15, 0, \reg, c14, c2, 1
-       @ Poll physical timer until ISTATUS is on
-1:     isb
-       mrc     p15, 0, \reg, c14, c2, 1
-       ands    \reg, \reg, #4
-       bne     1b
-       @ Disable timer
-       mov     \reg, #0
-       mcr     p15, 0, \reg, c14, c2, 1
-       isb
-.endm
-
 .globl psci_fiq_enter
 psci_fiq_enter:
        push    {r0-r12}