* MA 02111-1307 USA
*/
-
+#include <asm-offsets.h>
#include <config.h>
#include <version.h>
-
/*
*************************************************************************
*
.globl _TEXT_BASE
_TEXT_BASE:
- .word TEXT_BASE
-
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
+ .word CONFIG_SYS_TEXT_BASE
/*
* These are defined in the board-specific linker script.
+ * Subtracting _start from them lets the linker put their
+ * relative position in the executable instead of leaving
+ * them null.
*/
-.globl _bss_start
-_bss_start:
- .word __bss_start
+.globl _bss_start_ofs
+_bss_start_ofs:
+ .word __bss_start - _start
-.globl _bss_end
-_bss_end:
- .word _end
+.globl _bss_end_ofs
+_bss_end_ofs:
+ .word _end - _start
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.word 0x0badc0de
#endif
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
-.globl _datarel_start
-_datarel_start:
- .word __datarel_start
-
-.globl _datarelrolocal_start
-_datarelrolocal_start:
- .word __datarelrolocal_start
-
-.globl _datarellocal_start
-_datarellocal_start:
- .word __datarellocal_start
-
-.globl _datarelro_start
-_datarelro_start:
- .word __datarelro_start
-
-.globl _got_start
-_got_start:
- .word __got_start
-
-.globl _got_end
-_got_end:
- .word __got_end
-
/*
* the actual reset code
*/
adr r0, _start
ldr r2, _TEXT_BASE
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
+ ldr r3, _bss_start_ofs
+ add r2, r0, r3 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end addreee [r2] */
- ble copy_loop
+ cmp r0, r2 /* until source end address [r2] */
+ blo copy_loop
#ifndef CONFIG_PRELOADER
- /* fix got entries */
- ldr r1, _TEXT_BASE /* Text base */
- mov r0, r7 /* reloc addr */
- ldr r2, _got_start /* addr in Flash */
- ldr r3, _got_end /* addr in Flash */
- sub r3, r3, r1
- add r3, r3, r0
- sub r2, r2, r1
- add r2, r2, r0
-
+ /*
+ * fix .rel.dyn relocations
+ */
+ ldr r0, _TEXT_BASE /* r0 <- Text base */
+ sub r9, r7, r0 /* r9 <- relocation offset */
+ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
+ add r10, r10, r0 /* r10 <- sym table in FLASH */
+ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
+ add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
+ ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
+ add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
- ldr r4, [r2]
- sub r4, r4, r1
- add r4, r4, r0
- str r4, [r2]
- add r2, r2, #4
+ ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
+ add r0, r0, r9 /* r0 <- location to fix up in RAM */
+ ldr r1, [r2, #4]
+ and r8, r1, #0xff
+ cmp r8, #23 /* relative fixup? */
+ beq fixrel
+ cmp r8, #2 /* absolute fixup? */
+ beq fixabs
+ /* ignore unknown type of fixup */
+ b fixnext
+fixabs:
+ /* absolute fix: set location to (offset) symbol value */
+ mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
+ add r1, r10, r1 /* r1 <- address of symbol in table */
+ ldr r1, [r1, #4] /* r1 <- symbol value */
+ add r1, r9 /* r1 <- relocated sym addr */
+ b fixnext
+fixrel:
+ /* relative fix: increase location by offset */
+ ldr r1, [r0]
+ add r1, r1, r9
+fixnext:
+ str r1, [r0]
+ add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
- bne fixloop
+ blo fixloop
#endif
-#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
- ldr r0, _bss_start
- ldr r1, _bss_end
+ ldr r0, _bss_start_ofs
+ ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
- sub r0, r0, r3
add r0, r0, r4
- sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
- ldr r0, _TEXT_BASE
- ldr r2, _board_init_r
- sub r2, r2, r0
- add r2, r2, r7 /* position from board_init_r in RAM */
+ ldr r0, _board_init_r_ofs
+ adr r1, _start
+ add lr, r0, r1
+ add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
- mov lr, r2
mov pc, lr
-_board_init_r: .word board_init_r
-
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
- /*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
-
-#define pWDTCTL 0x80001400 /* Watchdog Timer control register */
-#define pINTENC 0x8000050C /* Interupt-Controller enable clear register */
-#define pCLKSET 0x80000420 /* clock divisor register */
+_board_init_r_ofs:
+ .word board_init_r - _start
- /* disable watchdog, set watchdog control register to
- * all zeros (default reset)
- */
- ldr r0, =pWDTCTL
- mov r1, #0x0
- str r1, [r0]
-
- /*
- * mask all IRQs by setting all bits in the INTENC register (default)
- */
- mov r1, #0xffffffff
- ldr r0, =pINTENC
- str r1, [r0]
-
- /* FCLK:HCLK:PCLK = 1:2:2 */
- /* default FCLK is 200 MHz, using 14.7456 MHz fin */
- ldr r0, =pCLKSET
- ldr r1, =0x0004ee39
-@ ldr r1, =0x0005ee39 @ 1: 2: 4
- str r1, [r0]
-
- /*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate: /* relocate U-Boot to RAM */
- adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
- cmp r0, r1 /* don't reloc during debug */
- beq stack_setup
-
- ldr r2, _armboot_start
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
-
-copy_loop:
- ldmia r0!, {r3-r10} /* copy from source address [r0] */
- stmia r1!, {r3-r10} /* copy to target address [r1] */
- cmp r0, r2 /* until source end addreee [r2] */
- blt copy_loop /* a 'ble' here actually copies */
- /* four bytes of bss */
-#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
- /* Set up the stack */
-stack_setup:
- ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
- sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
- sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
-#ifdef CONFIG_USE_IRQ
- sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
-#endif
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-
-clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- @add r0, r0, #4 /* start at first byte of bss */
- /* why inc. 4 bytes past then? */
- ldr r1, _bss_end /* stop here */
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- ble clbss_l
-
- ldr pc, _start_armboot
-
-_start_armboot: .word start_armboot
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
+_rel_dyn_start_ofs:
+ .word __rel_dyn_start - _start
+_rel_dyn_end_ofs:
+ .word __rel_dyn_end - _start
+_dynsym_start_ofs:
+ .word __dynsym_start - _start
/*
*************************************************************************
.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r2, _armboot_start
- sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
-#else
ldr r2, IRQ_STACK_START_IN
-#endif
ldmia r2, {r2 - r3} @ get pc, cpsr
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
.endm
.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
- ldr r13, _armboot_start @ setup our mode stack
- sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
- sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
-#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
projects / karo-tx-uboot.git / blobdiff