]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - arch/arm/dts/tegra114.dtsi
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
[karo-tx-uboot.git] / arch / arm / dts / tegra114.dtsi
index 0cb13d0735de24d94c59eb2a3e0513387792eaf7..f86d18dd7c9c1b8922019bf3917d7cd09149443c 100644 (file)
                clocks = <&tegra_car 47>;
                status = "disabled";
        };
+
+       spi@7000d400 {
+               compatible = "nvidia,tegra114-spi";
+               reg = <0x7000d400 0x200>;
+               interrupts = <0 59 0x04>;
+               nvidia,dma-request-selector = <&apbdma 15>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+               /* PERIPH_ID_SBC1, PLLP_OUT0 */
+               clocks = <&tegra_car 41>;
+       };
+
+       spi@7000d600 {
+               compatible = "nvidia,tegra114-spi";
+               reg = <0x7000d600 0x200>;
+               interrupts = <0 82 0x04>;
+               nvidia,dma-request-selector = <&apbdma 16>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+               /* PERIPH_ID_SBC2, PLLP_OUT0 */
+               clocks = <&tegra_car 44>;
+       };
+
+       spi@7000d800 {
+               compatible = "nvidia,tegra114-spi";
+               reg = <0x7000d480 0x200>;
+               interrupts = <0 83 0x04>;
+               nvidia,dma-request-selector = <&apbdma 17>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+               /* PERIPH_ID_SBC3, PLLP_OUT0 */
+               clocks = <&tegra_car 46>;
+       };
+
+       spi@7000da00 {
+               compatible = "nvidia,tegra114-spi";
+               reg = <0x7000da00 0x200>;
+               interrupts = <0 93 0x04>;
+               nvidia,dma-request-selector = <&apbdma 18>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+               /* PERIPH_ID_SBC4, PLLP_OUT0 */
+               clocks = <&tegra_car 68>;
+       };
+
+       spi@7000dc00 {
+               compatible = "nvidia,tegra114-spi";
+               reg = <0x7000dc00 0x200>;
+               interrupts = <0 94 0x04>;
+               nvidia,dma-request-selector = <&apbdma 27>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+               /* PERIPH_ID_SBC5, PLLP_OUT0 */
+               clocks = <&tegra_car 104>;
+       };
+
+       spi@7000de00 {
+               compatible = "nvidia,tegra114-spi";
+               reg = <0x7000de00 0x200>;
+               interrupts = <0 79 0x04>;
+               nvidia,dma-request-selector = <&apbdma 28>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+               /* PERIPH_ID_SBC6, PLLP_OUT0 */
+               clocks = <&tegra_car 105>;
+       };
+
+       sdhci@78000000 {
+               compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
+               reg = <0x78000000 0x200>;
+               interrupts = <0 14 0x04>;
+               clocks = <&tegra_car 14>;
+               status = "disable";
+       };
+
+       sdhci@78000200 {
+               compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
+               reg = <0x78000200 0x200>;
+               interrupts = <0 15 0x04>;
+               clocks = <&tegra_car 9>;
+               status = "disable";
+       };
+
+       sdhci@78000400 {
+               compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
+               reg = <0x78000400 0x200>;
+               interrupts = <0 19 0x04>;
+               clocks = <&tegra_car 69>;
+               status = "disable";
+       };
+
+       sdhci@78000600 {
+               compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
+               reg = <0x78000600 0x200>;
+               interrupts = <0 31 0x04>;
+               clocks = <&tegra_car 15>;
+               status = "disable";
+       };
 };