#ifndef _CLOCKS_AM33XX_H_
#define _CLOCKS_AM33XX_H_
-#define OSC 24
+#define OSC (V_OSCK/1000000)
-/* MAIN PLL */
#ifndef CONFIG_SYS_MPU_CLK
-/* default to 500 MHz */
-#define MPUPLL_M 500
+/* MAIN PLL Fdll = 550 MHZ, */
+#define MPUPLL_M 550
#else
#define MPUPLL_M CONFIG_SYS_MPU_CLK
#endif
-#define MPUPLL_N 23
+#define MPUPLL_N (OSC - 1)
#define MPUPLL_M2 1
/* Core PLL Fdll = 1 GHZ, */
#define COREPLL_M 1000
-#define COREPLL_N 23
+#define COREPLL_N (OSC - 1)
#define COREPLL_M4 10 /* CORE_CLKOUTM4 = 200 MHZ */
#define COREPLL_M5 8 /* CORE_CLKOUTM5 = 250 MHZ */
* For clkout = 192 MHZ, Fdll = 960 MHZ, divider values are given below
*/
#define PERPLL_M 960
-#define PERPLL_N 23
+#define PERPLL_N (OSC - 1)
#define PERPLL_M2 5
/* DDR Freq is 266 MHZ for now */
#else
#define DDRPLL_M CONFIG_SYS_DDR_CLK
#endif
-#define DDRPLL_N 23
+#define DDRPLL_N (OSC - 1)
#define DDRPLL_M2 1
#define DISPPLL_M 200
-#define DISPPLL_N 23
+#define DISPPLL_N (OSC - 1)
#define DISPPLL_M2 1
extern void pll_init(void);