Merge branch 'u-boot/master' into u-boot-arm/master

[karo-tx-uboot.git] / arch / arm / include / asm / arch-am33xx / cpu.h

diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 6cfbef76a79236130add2df5de3aa5f8a662e4e2..bcb4c5037fd4ecc88d36374211569f15ae815f75 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -5,15 +5,7 @@
  *
  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
- * GNU General Public License for more details.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _AM33XX_CPU_H
@@ -42,9 +34,10 @@
 #define HS_DEVICE                      0x2
 #define GP_DEVICE                      0x3
 
-/* cpu-id for AM33XX family */
+/* cpu-id for AM33XX and TI81XX family */
 #define AM335X                         0xB944
-#define DEVICE_ID                      0x44E10600
+#define TI81XX                         0xB81E
+#define DEVICE_ID                      (CTRL_BASE + 0x0600)
 
 /* This gives the status of the boot mode pins on the evm */
 #define SYSBOOT_MASK                   (BIT(0) | BIT(1) | BIT(2)\
@@ -52,14 +45,69 @@
 
 /* Reset control */
 #ifdef CONFIG_AM33XX
-#define PRM_RSTCTRL                    0x44E00F00
-#define PRM_RSTST                      0x44E00F08
+#define PRM_RSTCTRL                    (PRCM_BASE + 0x0F00)
+#elif defined(CONFIG_TI814X)
+#define PRM_RSTCTRL                    (PRCM_BASE + 0x00A0)
 #endif
+#define PRM_RSTST                      (PRM_RSTCTRL + 8)
 #define PRM_RSTCTRL_RESET              0x01
 #define PRM_RSTST_WARM_RESET_MASK      0x232
 
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
+struct gpmc_cs {
+       u32 config1;            /* 0x00 */
+       u32 config2;            /* 0x04 */
+       u32 config3;            /* 0x08 */
+       u32 config4;            /* 0x0C */
+       u32 config5;            /* 0x10 */
+       u32 config6;            /* 0x14 */
+       u32 config7;            /* 0x18 */
+       u32 nand_cmd;           /* 0x1C */
+       u32 nand_adr;           /* 0x20 */
+       u32 nand_dat;           /* 0x24 */
+       u8 res[8];              /* blow up to 0x30 byte */
+};
+
+struct bch_res_0_3 {
+       u32 bch_result_x[4];
+};
+
+struct gpmc {
+       u8 res1[0x10];
+       u32 sysconfig;          /* 0x10 */
+       u8 res2[0x4];
+       u32 irqstatus;          /* 0x18 */
+       u32 irqenable;          /* 0x1C */
+       u8 res3[0x20];
+       u32 timeout_control;    /* 0x40 */
+       u8 res4[0xC];
+       u32 config;             /* 0x50 */
+       u32 status;             /* 0x54 */
+       u8 res5[0x8];           /* 0x58 */
+       struct gpmc_cs cs[8];   /* 0x60, 0x90, .. */
+       u8 res6[0x14];          /* 0x1E0 */
+       u32 ecc_config;         /* 0x1F4 */
+       u32 ecc_control;        /* 0x1F8 */
+       u32 ecc_size_config;    /* 0x1FC */
+       u32 ecc1_result;        /* 0x200 */
+       u32 ecc2_result;        /* 0x204 */
+       u32 ecc3_result;        /* 0x208 */
+       u32 ecc4_result;        /* 0x20C */
+       u32 ecc5_result;        /* 0x210 */
+       u32 ecc6_result;        /* 0x214 */
+       u32 ecc7_result;        /* 0x218 */
+       u32 ecc8_result;        /* 0x21C */
+       u32 ecc9_result;        /* 0x220 */
+       u8 res7[12];            /* 0x224 */
+       u32 testmomde_ctrl;     /* 0x230 */
+       u8 res8[12];            /* 0x234 */
+       struct bch_res_0_3 bch_result_0_3[2];   /* 0x240 */
+};
+
+/* Used for board specific gpmc initialization */
+extern struct gpmc *gpmc_cfg;
+
 /* Encapsulating core pll registers */
 struct cm_wkuppll {
        unsigned int wkclkstctrl;       /* offset 0x00 */
@@ -82,7 +130,8 @@ struct cm_wkuppll {
        unsigned int clkseldpllcore;    /* offset 0x68 */
        unsigned int resv9[1];
        unsigned int idlestdpllper;     /* offset 0x70 */
-       unsigned int resv10[3];
+       unsigned int resv10[2];
+       unsigned int clkdcoldodpllper;  /* offset 0x7c */
        unsigned int divm4dpllcore;     /* offset 0x80 */
        unsigned int divm5dpllcore;     /* offset 0x84 */
        unsigned int clkmoddpllmpu;     /* offset 0x88 */
@@ -169,6 +218,12 @@ struct cm_dpll {
        unsigned int clktimer2clk;      /* offset 0x08 */
 };
 
+/* Control Module RTC registers */
+struct cm_rtc {
+       unsigned int rtcclkctrl;        /* offset 0x0 */
+       unsigned int clkstctrl;         /* offset 0x4 */
+};
+
 /* Watchdog timer registers */
 struct wd_timer {
        unsigned int resv1[4];
@@ -218,6 +273,15 @@ struct gptimer {
        unsigned int tcar2;             /* offset 0x58 */
 };
 
+/* RTC Registers */
+struct rtc_regs {
+       unsigned int res[21];
+       unsigned int osc;               /* offset 0x54 */
+       unsigned int res2[5];
+       unsigned int kick0r;            /* offset 0x6c */
+       unsigned int kick1r;            /* offset 0x70 */
+};
+
 /* UART Registers */
 struct uart_sys {
        unsigned int resv1[21];
@@ -260,12 +324,16 @@ struct ctrl_stat {
 /* Control Device Register */
 struct ctrl_dev {
        unsigned int deviceid;          /* offset 0x00 */
-       unsigned int resv1[11];
+       unsigned int resv1[7];
+       unsigned int usb_ctrl0;         /* offset 0x20 */
+       unsigned int resv2;
+       unsigned int usb_ctrl1;         /* offset 0x28 */
+       unsigned int resv3;
        unsigned int macid0l;           /* offset 0x30 */
        unsigned int macid0h;           /* offset 0x34 */
        unsigned int macid1l;           /* offset 0x38 */
        unsigned int macid1h;           /* offset 0x3c */
-       unsigned int resv2[4];
+       unsigned int resv4[4];
        unsigned int miisel;            /* offset 0x50 */
 };
 #endif /* __ASSEMBLY__ */