Merge branch 'karo-tx-uboot' into kc-merge

[karo-tx-uboot.git] / arch / arm / include / asm / arch-am33xx / ddr_defs.h

diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index fbe599d1ab36444cc62ab38609a26dca2149a7e4..719f3e22905c2bdf86b2f3e77f97c8ef43d80934 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -17,7 +17,11 @@
 /* AM335X EMIF Register values */
 #define VTP_CTRL_READY         (0x1 << 5)
 #define VTP_CTRL_ENABLE                (0x1 << 6)
-#define VTP_CTRL_START_EN      (0x1)
+#define VTP_CTRL_FILTER_SHIFT  1
+#define VTP_CTRL_FILTER_MASK   (0x7 << VTP_CTRL_FILTER_SHIFT)
+#define VTP_CTRL_FILTER(n)     (((n) << VTP_CTRL_FILTER_SHIFT) & VTP_CTRL_FILTER_MASK)
+#define VTP_CTRL_START_EN      (0x1 << 0)
+#define PHY_DLL_LOCK_DIFF      0x0
 #ifdef CONFIG_AM43XX
 #define DDR_CKE_CTRL_NORMAL    0x3
 #else
@@ -33,11 +37,7 @@
 #define MT47H128M16RT25E_EMIF_SDCFG            0x41805332
 #define MT47H128M16RT25E_EMIF_SDREF            0x0000081a
 #define MT47H128M16RT25E_RATIO                 0x80
-#define MT47H128M16RT25E_INVERT_CLKOUT         0x00
 #define MT47H128M16RT25E_RD_DQS                        0x12
-#define MT47H128M16RT25E_WR_DQS                        0x00
-#define MT47H128M16RT25E_PHY_WRLVL             0x00
-#define MT47H128M16RT25E_PHY_GATELVL           0x00
 #define MT47H128M16RT25E_PHY_WR_DATA           0x40
 #define MT47H128M16RT25E_PHY_FIFO_WE           0x80
 #define MT47H128M16RT25E_IOCTRL_VALUE          0x18B
@@ -58,6 +58,22 @@
 #define MT41J128MJT125_PHY_FIFO_WE             0x100
 #define MT41J128MJT125_IOCTRL_VALUE            0x18B
 
+/* Micron MT41K128M16JT-187E */
+#define MT41K128MJT187E_EMIF_READ_LATENCY      0x06
+#define MT41K128MJT187E_EMIF_TIM1              0x0888B3DB
+#define MT41K128MJT187E_EMIF_TIM2              0x36337FDA
+#define MT41K128MJT187E_EMIF_TIM3              0x501F830F
+#define MT41K128MJT187E_EMIF_SDCFG             0x61C04AB2
+#define MT41K128MJT187E_EMIF_SDREF             0x0000093B
+#define MT41K128MJT187E_ZQ_CFG                 0x50074BE4
+#define MT41K128MJT187E_RATIO                  0x40
+#define MT41K128MJT187E_INVERT_CLKOUT          0x1
+#define MT41K128MJT187E_RD_DQS                 0x3B
+#define MT41K128MJT187E_WR_DQS                 0x85
+#define MT41K128MJT187E_PHY_WR_DATA            0xC1
+#define MT41K128MJT187E_PHY_FIFO_WE            0x100
+#define MT41K128MJT187E_IOCTRL_VALUE           0x18B
+
 /* Micron MT41J64M16JT-125 */
 #define MT41J64MJT125_EMIF_SDCFG               0x61C04A32