Merge branch 'u-boot/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / arch / arm / include / asm / arch-at91 / at91cap9.h

diff --git a/arch/arm/include/asm/arch-at91/at91cap9.h b/arch/arm/include/asm/arch-at91/at91cap9.h
index 5af6fdc25118adef972a6fd6bf320b700d120ab0..63870bc65d65cdc156a5bd3a611348b397e8fe16 100644 (file)
--- a/arch/arm/include/asm/arch-at91/at91cap9.h
+++ b/arch/arm/include/asm/arch-at91/at91cap9.h
@@ -1,17 +1,14 @@
 /*
  * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9.h]
  *
- *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
+ *  Copyright (C) 2007 Stelian Pop <stelian@popies.net>
  *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
  *  Copyright (C) 2007 Atmel Corporation.
  *
  * Common definitions.
  * Based on AT91CAP9 datasheet revision B (Preliminary).
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef AT91CAP9_H
@@ -58,75 +55,6 @@
 #define AT91_RSTC_BASE 0xfffffd00
 #define AT91_PIT_BASE  0xfffffd30
 
-#ifdef CONFIG_AT91_LEGACY
-
-/*
- * User Peripheral physical base addresses.
- */
-#define AT91CAP9_BASE_UDPHS            0xfff78000
-#define AT91CAP9_BASE_TCB0             0xfff7c000
-#define AT91CAP9_BASE_TC0              0xfff7c000
-#define AT91CAP9_BASE_TC1              0xfff7c040
-#define AT91CAP9_BASE_TC2              0xfff7c080
-#define AT91CAP9_BASE_MCI0             0xfff80000
-#define AT91CAP9_BASE_MCI1             0xfff84000
-#define AT91CAP9_BASE_TWI              0xfff88000
-#define AT91CAP9_BASE_US0              0xfff8c000
-#define AT91CAP9_BASE_US1              0xfff90000
-#define AT91CAP9_BASE_US2              0xfff94000
-#define AT91CAP9_BASE_SSC0             0xfff98000
-#define AT91CAP9_BASE_SSC1             0xfff9c000
-#define AT91CAP9_BASE_AC97C            0xfffa0000
-#define AT91CAP9_BASE_SPI0             0xfffa4000
-#define AT91CAP9_BASE_SPI1             0xfffa8000
-#define AT91CAP9_BASE_CAN              0xfffac000
-#define AT91CAP9_BASE_PWMC             0xfffb8000
-#define AT91CAP9_BASE_EMAC             0xfffbc000
-#define AT91CAP9_BASE_ADC              0xfffc0000
-#define AT91CAP9_BASE_ISI              0xfffc4000
-#define AT91_BASE_SYS                  0xffffe200
-
-/*
- * System Peripherals (offset from AT91_BASE_SYS)
- */
-#define AT91_ECC       (0xffffe200 - AT91_BASE_SYS)
-#define AT91_BCRAMC    (0xffffe400 - AT91_BASE_SYS)
-#define AT91_DDRSDRC   (0xffffe600 - AT91_BASE_SYS)
-#define AT91_SMC       (0xffffe800 - AT91_BASE_SYS)
-#define AT91_MATRIX    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_CCFG      (0xffffeb10 - AT91_BASE_SYS)
-#define AT91_DMA       (0xffffec00 - AT91_BASE_SYS)
-#define AT91_DBGU      (0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
-#define AT91_PIOA      (0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOB      (0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOC      (0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOD      (0xfffff800 - AT91_BASE_SYS)
-#define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC     (0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT       (0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT       (0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
-#define AT91_SCKCR     (0xfffffd50 - AT91_BASE_SYS)
-#define AT91_GPBR_REVB (0xfffffd50 - AT91_BASE_SYS)
-#define AT91_GPBR_REVC (0xfffffd60 - AT91_BASE_SYS)
-
-#define AT91_USART0    AT91CAP9_BASE_US0
-#define AT91_USART1    AT91CAP9_BASE_US1
-#define AT91_USART2    AT91CAP9_BASE_US2
-
-/*
- * SCKCR flags
- */
-#define AT91CAP9_SCKCR_RCEN    (1 << 0)        /* RC Oscillator Enable */
-#define AT91CAP9_SCKCR_OSC32EN (1 << 1)        /* 32kHz Oscillator Enable */
-#define AT91CAP9_SCKCR_OSC32BYP        (1 << 2)        /* 32kHz Oscillator Bypass */
-#define AT91CAP9_SCKCR_OSCSEL  (1 << 3)        /* Slow Clock Selector */
-#define                AT91CAP9_SCKCR_OSCSEL_RC        (0 << 3)
-#define                AT91CAP9_SCKCR_OSCSEL_32        (1 << 3)
-
-#endif /* CONFIG_AT91_LEGACY */
 /*
  * Internal Memory.
  */