#define AIPS1_ARB_END_ADDR 0x020FFFFF
#define AIPS2_ARB_BASE_ADDR 0x02100000
#define AIPS2_ARB_END_ADDR 0x021FFFFF
-/* AIPS3 only on i.MX6SX */
+/* AIPS3 only on i.MX6SX && i.MX6ULL */
#define AIPS3_ARB_BASE_ADDR 0x02200000
#define AIPS3_ARB_END_ADDR 0x022FFFFF
#ifdef CONFIG_SOC_MX6SX
#define PWM8_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xB0000)
#endif
#define MX6SX_WDOG3_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x88000)
+#ifdef CONFIG_SOC_MX6ULL
+#define AIPS3_CONFIG_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x7C000)
+#endif
-/* only for i.MX6SX/UL */
+/* only for i.MX6SX/UL/ULL */
#define WDOG3_BASE_ADDR ((is_cpu_type(MXC_CPU_MX6UL) || \
is_cpu_type(MXC_CPU_MX6ULL)) ? \
MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)