Merge branch 'master' of git://git.denx.de/u-boot-usb

[karo-tx-uboot.git] / arch / arm / include / asm / arch-omap4 / omap.h

diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 47c5883025ce818b8865e92d9c577edb8a85d3fa..44353a43f2591b956dce5a1a9fd13e9de050aef1 100644 (file)
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -112,7 +112,7 @@
 #define CONTROL_LPDDR2IO_SLEW_325PS_DRV8_GATE_KEEPER   0x9E9E9E9E
 #define CONTROL_LPDDR2IO_SLEW_315PS_DRV12_PULL_DOWN    0x7C7C7C7C
 #define LPDDR2IO_GR10_WD_MASK                          (3 << 17)
-#define CONTROL_LPDDR2IO_3_VAL         0xA0888C00
+#define CONTROL_LPDDR2IO_3_VAL         0xA0888C0F
 
 /* CONTROL_EFUSE_2 */
 #define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1           0x00ffc000
@@ -132,34 +132,6 @@ struct s32ktimer {
 #define DEVICE_TYPE_MASK (0x7 << DEVICE_TYPE_SHIFT)
 #define DEVICE_GP 0x3
 
-struct omap_sys_ctrl_regs {
-       unsigned int pad1[129];
-       unsigned int control_id_code;                   /* 0x4A002204 */
-       unsigned int pad11[22];
-       unsigned int control_std_fuse_opp_bgap;         /* 0x4a002260 */
-       unsigned int pad2[24];                          /* 0x4a002264 */
-       unsigned int control_status;                    /* 0x4a0022c4 */
-       unsigned int pad3[22];                          /* 0x4a0022c8 */
-       unsigned int control_ldosram_iva_voltage_ctrl;  /* 0x4A002320 */
-       unsigned int control_ldosram_mpu_voltage_ctrl;  /* 0x4A002324 */
-       unsigned int control_ldosram_core_voltage_ctrl; /* 0x4A002328 */
-       unsigned int pad4[260277];
-       unsigned int control_pbiaslite;                 /* 0x4A100600 */
-       unsigned int pad5[63];
-       unsigned int control_efuse_1;                   /* 0x4A100700 */
-       unsigned int control_efuse_2;                   /* 0x4A100704 */
-};
-
-struct control_lpddr2io_regs {
-       unsigned int control_lpddr2io1_0;
-       unsigned int control_lpddr2io1_1;
-       unsigned int control_lpddr2io1_2;
-       unsigned int control_lpddr2io1_3;
-       unsigned int control_lpddr2io2_0;
-       unsigned int control_lpddr2io2_1;
-       unsigned int control_lpddr2io2_2;
-       unsigned int control_lpddr2io2_3;
-};
 #endif /* __ASSEMBLY__ */
 
 /*
@@ -169,40 +141,7 @@ struct control_lpddr2io_regs {
  */
 #define NON_SECURE_SRAM_START  0x40304000
 #define NON_SECURE_SRAM_END    0x4030E000      /* Not inclusive */
+#define SRAM_SCRATCH_SPACE_ADDR        NON_SECURE_SRAM_START
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE     0x4030D000
-/* Temporary SRAM stack used while low level init is done */
-#define LOW_LEVEL_SRAM_STACK           NON_SECURE_SRAM_END
-#define SRAM_SCRATCH_SPACE_ADDR                NON_SECURE_SRAM_START
-/* SRAM scratch space entries */
-#define OMAP4_SRAM_SCRATCH_OMAP4_REV   SRAM_SCRATCH_SPACE_ADDR
-#define OMAP4_SRAM_SCRATCH_EMIF_SIZE   (SRAM_SCRATCH_SPACE_ADDR + 0x4)
-#define OMAP4_SRAM_SCRATCH_EMIF_T_NUM  (SRAM_SCRATCH_SPACE_ADDR + 0xC)
-#define OMAP4_SRAM_SCRATCH_EMIF_T_DEN  (SRAM_SCRATCH_SPACE_ADDR + 0x10)
-#define OMAP4_SRAM_SCRATCH_SPACE_END   (SRAM_SCRATCH_SPACE_ADDR + 0x14)
-
-/* ROM code defines */
-/* Boot device */
-#define BOOT_DEVICE_MASK       0xFF
-#define BOOT_DEVICE_OFFSET     0x8
-#define DEV_DESC_PTR_OFFSET    0x4
-#define DEV_DATA_PTR_OFFSET    0x18
-#define BOOT_MODE_OFFSET       0x8
-#define RESET_REASON_OFFSET    0x9
-#define CH_FLAGS_OFFSET                0xA
-
-#define CH_FLAGS_CHSETTINGS    (0x1 << 0)
-#define CH_FLAGS_CHRAM         (0x1 << 1)
-#define CH_FLAGS_CHFLASH       (0x1 << 2)
-#define CH_FLAGS_CHMMCSD       (0x1 << 3)
-
-#ifndef __ASSEMBLY__
-struct omap_boot_parameters {
-       char *boot_message;
-       unsigned int mem_boot_descriptor;
-       unsigned char omap_bootdevice;
-       unsigned char reset_reason;
-       unsigned char ch_flags;
-};
-#endif
 #endif