ARM: tegra: pinctrl: remove vddio

[karo-tx-uboot.git] / arch / arm / include / asm / arch-tegra30 / pinmux.h

diff --git a/arch/arm/include/asm/arch-tegra30/pinmux.h b/arch/arm/include/asm/arch-tegra30/pinmux.h
index 341951bfcb666f1df2c471df3433761fbf14b8f8..0704e4d4d4a1d0a76f488e6a84a3f66430628a41 100644 (file)
--- a/arch/arm/include/asm/arch-tegra30/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra30/pinmux.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2010-2013, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -438,7 +438,6 @@ enum pmux_func {
        PMUX_FUNC_CPU_PWR_REQ,
        PMUX_FUNC_PWR_INT_N,
        PMUX_FUNC_CLK_32K_IN,
-       PMUX_FUNC_SAFE,
 
        PMUX_FUNC_MAX,
 
@@ -510,25 +509,61 @@ enum pmux_pin_ioreset {
                                (((ioreset) >= PMUX_PIN_IO_RESET_DEFAULT) && \
                                ((ioreset) <= PMUX_PIN_IO_RESET_ENABLE))
 
-/* Available power domains used by pin groups */
-enum pmux_vddio {
-       PMUX_VDDIO_BB = 0,
-       PMUX_VDDIO_LCD,
-       PMUX_VDDIO_VI,
-       PMUX_VDDIO_UART,
-       PMUX_VDDIO_DDR,
-       PMUX_VDDIO_NAND,
-       PMUX_VDDIO_SYS,
-       PMUX_VDDIO_AUDIO,
-       PMUX_VDDIO_SD,
-       PMUX_VDDIO_CAM,
-       PMUX_VDDIO_GMI,
-       PMUX_VDDIO_PEXCTL,
-       PMUX_VDDIO_SDMMC1,
-       PMUX_VDDIO_SDMMC3,
-       PMUX_VDDIO_SDMMC4,
-
-       PMUX_VDDIO_NONE
+#define PGRP_SLWF_NONE -1
+#define PGRP_SLWF_MAX  3
+#define        PGRP_SLWR_NONE  PGRP_SLWF_NONE
+#define PGRP_SLWR_MAX  PGRP_SLWF_MAX
+
+#define PGRP_DRVUP_NONE        -1
+#define PGRP_DRVUP_MAX 127
+#define        PGRP_DRVDN_NONE PGRP_DRVUP_NONE
+#define PGRP_DRVDN_MAX PGRP_DRVUP_MAX
+
+/* return 1 if a padgrp is in range */
+#define pmux_padgrp_isvalid(pd) (((pd) >= 0) && ((pd) < PDRIVE_PINGROUP_COUNT))
+
+/* return 1 if a slew-rate rising/falling edge value is in range */
+#define pmux_pad_slw_isvalid(slw) (((slw) >= 0) && ((slw) <= PGRP_SLWF_MAX))
+
+/* return 1 if a driver output pull-up/down strength code value is in range */
+#define pmux_pad_drv_isvalid(drv) (((drv) >= 0) && ((drv) <= PGRP_DRVUP_MAX))
+
+/* return 1 if a low-power mode value is in range */
+#define pmux_pad_lpmd_isvalid(lpm) (((lpm) >= 0) && ((lpm) <= PGRP_LPMD_X))
+
+/* Defines a pin group cfg's low-power mode select */
+enum pgrp_lpmd {
+       PGRP_LPMD_X8 = 0,
+       PGRP_LPMD_X4,
+       PGRP_LPMD_X2,
+       PGRP_LPMD_X,
+       PGRP_LPMD_NONE = -1,
+};
+
+/* Defines whether a pin group cfg's schmidt is enabled or not */
+enum pgrp_schmt {
+       PGRP_SCHMT_DISABLE = 0,
+       PGRP_SCHMT_ENABLE = 1,
+};
+
+/* Defines whether a pin group cfg's high-speed mode is enabled or not */
+enum pgrp_hsm {
+       PGRP_HSM_DISABLE = 0,
+       PGRP_HSM_ENABLE = 1,
+};
+
+/*
+ * This defines the configuration for a pin group's pad control config
+ */
+struct padctrl_config {
+       enum pdrive_pingrp padgrp;      /* pin group PDRIVE_PINGRP_x */
+       int slwf;                       /* falling edge slew         */
+       int slwr;                       /* rising edge slew          */
+       int drvup;                      /* pull-up drive strength    */
+       int drvdn;                      /* pull-down drive strength  */
+       enum pgrp_lpmd lpmd;            /* low-power mode selection  */
+       enum pgrp_schmt schmt;          /* schmidt enable            */
+       enum pgrp_hsm hsm;              /* high-speed mode enable    */
 };
 
 /* t30 pin drive group and pin mux registers */
@@ -600,4 +635,12 @@ void pinmux_config_table(struct pingroup_config *config, int len);
 /* Set a group of pins from a table */
 void pinmux_init(void);
 
+/**
+ * Set the GP pad configs
+ *
+ * @param config       List of config items
+ * @param len          Number of config items in list
+ */
+void padgrp_config_table(struct padctrl_config *config, int len);
+
 #endif /* _TEGRA30_PINMUX_H_ */