* MA 02110-1301, USA.
*/
-#ifndef __MACH_IOMUX_V3_H__
-#define __MACH_IOMUX_V3_H__
+#ifndef __ASM_ARCH_IOMUX_V3_H__
+#define __ASM_ARCH_IOMUX_V3_H__
/*
* build IOMUX_PAD structure
* PAD_CTRL_OFS: 12..23 (12)
* SEL_INPUT_OFS: 24..35 (12)
* MUX_MODE + SION: 36..40 (5)
- * PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
+ * PAD_CTRL + PAD_CTRL_VALID: 41..58 (18)
* SEL_INP: 59..62 (4)
* reserved: 63 (1)
*/
#define MUX_SEL_INPUT_SHIFT 59
#define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)
-#define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)
+#define MUX_PAD_CTRL(x) (((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT) | \
+ PAD_CTRL_VALID)
#define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \
sel_input, pad_ctrl) \
#define NO_PAD_CTRL (1 << 17)
#define GPIO_PIN_MASK 0x1f
+#define PAD_CTRL_VALID ((iomux_v3_cfg_t)1 << (MUX_PAD_CTRL_SHIFT + 17))
#define GPIO_PORT_SHIFT 5
#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
#define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
#define MUX_CONFIG_SION (0x1 << 4)
+
int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
unsigned count);
-#endif /* __MACH_IOMUX_V3_H__*/
+#endif /* __ASM_ARCH_IOMUX_V3_H__*/