ARM: cache: implement a default weak flush_cache() function

[karo-tx-uboot.git] / arch / arm / lib / cache.c

diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 61ee9d3b13b96bfc5b8387a78de4edf990a5b166..cd13db3440ddf783e0cb8089e4cd5724a90e7831 100644 (file)
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -2,35 +2,89 @@
  * (C) Copyright 2002
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /* for now: just dummy functions to satisfy the linker */
 
 #include <common.h>
+#include <malloc.h>
+
+/*
+ * Flush range from all levels of d-cache/unified-cache.
+ * Affects the range [start, start + size - 1].
+ */
+__weak void flush_cache(unsigned long start, unsigned long size)
+{
+       flush_dcache_range(start, start + size);
+}
+
+/*
+ * Default implementation:
+ * do a range flush for the entire range
+ */
+__weak void flush_dcache_all(void)
+{
+       flush_cache(0, ~0);
+}
 
-void  flush_cache (unsigned long dummy1, unsigned long dummy2)
+/*
+ * Default implementation of enable_caches()
+ * Real implementation should be in platform code
+ */
+__weak void enable_caches(void)
 {
-#ifdef CONFIG_OMAP2420
-       void arm1136_cache_flush(void);
+       puts("WARNING: Caches not enabled\n");
+}
 
-       arm1136_cache_flush();
+__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+       /* An empty stub, real implementation should be in platform code */
+}
+__weak void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+       /* An empty stub, real implementation should be in platform code */
+}
+
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+/*
+ * Reserve one MMU section worth of address space below the malloc() area that
+ * will be mapped uncached.
+ */
+static unsigned long noncached_start;
+static unsigned long noncached_end;
+static unsigned long noncached_next;
+
+void noncached_init(void)
+{
+       phys_addr_t start, end;
+       size_t size;
+
+       end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) - MMU_SECTION_SIZE;
+       size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE);
+       start = end - size;
+
+       debug("mapping memory %pa-%pa non-cached\n", &start, &end);
+
+       noncached_start = start;
+       noncached_end = end;
+       noncached_next = start;
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+       mmu_set_region_dcache_behaviour(noncached_start, size, DCACHE_OFF);
 #endif
-       return;
 }
+
+phys_addr_t noncached_alloc(size_t size, size_t align)
+{
+       phys_addr_t next = ALIGN(noncached_next, align);
+
+       if (next >= noncached_end || (noncached_end - next) < size)
+               return 0;
+
+       debug("allocated %zu bytes of uncached memory @%pa\n", size, &next);
+       noncached_next = next + size;
+
+       return next;
+}
+#endif /* CONFIG_SYS_NONCACHED_MEMORY */