MPC8xxx: Define cache ops for USB

[karo-tx-uboot.git] / arch / powerpc / cpu / mpc83xx / Makefile

diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index 3979b6fbab69b990cc95930ccb6c1279b6252e75..012ab6b0207e2be87296c66448eea079bf71f59f 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -34,7 +34,6 @@ COBJS-y += cpu.o
 COBJS-y += cpu_init.o
 COBJS-y += speed.o
 COBJS-y += interrupts.o
-COBJS-y += spd_sdram.o
 COBJS-y += ecc.o
 COBJS-$(CONFIG_QE) += qe_io.o
 COBJS-$(CONFIG_FSL_SERDES) += serdes.o
@@ -42,9 +41,19 @@ COBJS-$(CONFIG_PCI) += pci.o
 COBJS-$(CONFIG_PCIE) += pcie.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
 
+# Stub implementations of cache management functions for USB
+COBJS-$(CONFIG_USB_EHCI) += cache.o
+
+ifdef CONFIG_FSL_DDR2
+COBJS_LN-$(CONFIG_MPC8349) += ddr-gen2.o
+else
+COBJS-y += spd_sdram.o
+endif
+COBJS-$(CONFIG_FSL_DDR2) += law.o
+
 COBJS  := $(COBJS-y)
-SRCS   := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+SRCS   := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN-y:.o=.c))
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN-y))
 START  := $(addprefix $(obj),$(START))
 
 all:   $(obj).depend $(START) $(LIB)
@@ -52,6 +61,15 @@ all: $(obj).depend $(START) $(LIB)
 $(LIB):        $(OBJS)
        $(call cmd_link_o_target, $(OBJS))
 
+$(obj)ddr-gen1.c:
+       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen1.c $(obj)ddr-gen1.c
+
+$(obj)ddr-gen2.c:
+       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen2.c $(obj)ddr-gen2.c
+
+$(obj)ddr-gen3.c:
+       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen3.c $(obj)ddr-gen3.c
+
 #########################################################################
 
 # defines $(obj).depend target