board/b4860qds: Add support to make Aurora work on B4860QDS

[karo-tx-uboot.git] / arch / powerpc / cpu / mpc85xx / b4860_serdes.c

diff --git a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
index bd3234271a1da1f1b644c827e7c9ad70e2f59565..c96ad0b486ebca24a8f56b693bedf1cec9483d0d 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
@@ -1,23 +1,7 @@
 /*
  * Copyright 2012 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -34,6 +18,24 @@ struct serdes_config {
 #ifdef CONFIG_PPC_B4860
 static struct serdes_config serdes1_cfg_tbl[] = {
        /* SerDes 1 */
+       {0x02, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x04, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x05, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x06, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x08, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x09, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x0A, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x0B, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x0C, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
        {0x0D, {CPRI8, CPRI7, CPRI6, CPRI5,
                CPRI4, CPRI3, CPRI2, CPRI1}},
        {0x0E, {CPRI8, CPRI7,   CPRI6, CPRI5,
@@ -60,8 +62,22 @@ static struct serdes_config serdes1_cfg_tbl[] = {
        {0x34, {AURORA, AURORA,
                SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
                CPRI4, CPRI3, CPRI2, CPRI1}},
+       {0x39, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x3A, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x3C, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x3D, {AURORA, AURORA, CPRI6, CPRI5,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
        {0x3E, {CPRI8, CPRI7,   CPRI6, CPRI5,
                CPRI4, CPRI3, CPRI2, CPRI1}},
+       {0x5C, {AURORA, AURORA,
+               SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
+       {0x5D, {AURORA, AURORA,
+               SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+               CPRI4, CPRI3, CPRI2, CPRI1} },
        {}
 };
 static struct serdes_config serdes2_cfg_tbl[] = {