Update from 2013.01 to 2013.07

[karo-tx-uboot.git] / arch / powerpc / cpu / mpc85xx / u-boot-spl.lds

diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 1c408e29f507bdae602e2d983f5a421849387a27..08188d75e5f12cf5a64f4f40aeae4066186311c6 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -4,28 +4,19 @@
  *
  * Copyright 2009 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include "config.h"    /* CONFIG_BOARDDIR */
 
 OUTPUT_ARCH(powerpc)
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
+PHDRS
+{
+       text PT_LOAD;
+       bss PT_LOAD;
+}
+#endif
 SECTIONS
 {
        . = CONFIG_SPL_TEXT_BASE;
@@ -60,7 +51,7 @@ SECTIONS
 #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
        .bootpg ADDR(.text) + 0x1000 :
        {
-               start.o (.bootpg)
+               arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
        }
 #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
 #elif defined(CONFIG_FSL_ELBC)
@@ -68,9 +59,16 @@ SECTIONS
 #else
 #error unknown NAND controller
 #endif
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
+       .bootpg ADDR(.text) - 0x1000 :
+       {
+               KEEP(*(.bootpg))
+       } :text = 0xffff
+#else
        .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
                KEEP(*(.resetvec))
        } = 0xffff
+#endif
 
        /*
         * Make sure that the bss segment isn't linked at 0x0, otherwise its
@@ -78,10 +76,12 @@ SECTIONS
         */
        . |= 0x10;
 
+       . = ALIGN(4);
        __bss_start = .;
        .bss : {
                *(.sbss*)
                *(.bss*)
        }
-       __bss_end__ = .;
+       . = ALIGN(4);
+       __bss_end = .;
 }