Merge remote-tracking branch 'u-boot/master' into test

[karo-tx-uboot.git] / arch / powerpc / cpu / mpc85xx / u-boot-spl.lds

diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 1c408e29f507bdae602e2d983f5a421849387a27..5ae7b3eedbc989b9d5636b27b70360ada39a70c3 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -4,28 +4,19 @@
  *
  * Copyright 2009 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#include "config.h"    /* CONFIG_BOARDDIR */
+#include "config.h"
 
 OUTPUT_ARCH(powerpc)
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
+PHDRS
+{
+       text PT_LOAD;
+       bss PT_LOAD;
+}
+#endif
 SECTIONS
 {
        . = CONFIG_SPL_TEXT_BASE;
@@ -53,16 +44,48 @@ SECTIONS
        }
        _edata  =  .;
 
+       . = ALIGN(4);
+       .u_boot_list : {
+               KEEP(*(SORT(.u_boot_list*)));
+       }
+
+       . = .;
+       __start___ex_table = .;
+       __ex_table : { *(__ex_table) }
+       __stop___ex_table = .;
+
        . = ALIGN(8);
        __init_begin = .;
        __init_end = .;
-/* FIXME for non-NAND SPL */
+#ifdef CONFIG_SPL_SKIP_RELOCATE
+       . = ALIGN(4);
+       __bss_start = .;
+       .bss : {
+               *(.sbss*)
+               *(.bss*)
+       }
+       . = ALIGN(4);
+       __bss_end = .;
+#endif
+
+/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
+       .bootpg ADDR(.text) - 0x1000 :
+       {
+               KEEP(*(.bootpg))
+       } :text = 0xffff
+#else
 #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
-       .bootpg ADDR(.text) + 0x1000 :
+#ifndef BOOT_PAGE_OFFSET
+#define BOOT_PAGE_OFFSET 0x1000
+#endif
+       .bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
        {
-               start.o (.bootpg)
+               arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
        }
+#ifndef RESET_VECTOR_OFFSET
 #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
+#endif
 #elif defined(CONFIG_FSL_ELBC)
 #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
 #else
@@ -71,17 +94,22 @@ SECTIONS
        .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
                KEEP(*(.resetvec))
        } = 0xffff
+#endif
 
+#ifndef CONFIG_SPL_SKIP_RELOCATE
        /*
         * Make sure that the bss segment isn't linked at 0x0, otherwise its
         * address won't be updated during relocation fixups.
         */
        . |= 0x10;
 
+       . = ALIGN(4);
        __bss_start = .;
        .bss : {
                *(.sbss*)
                *(.bss*)
        }
-       __bss_end__ = .;
+       . = ALIGN(4);
+       __bss_end = .;
+#endif
 }