Merge branch 'u-boot/master' into u-boot-arm/master

[karo-tx-uboot.git] / arch / powerpc / cpu / ppc4xx / fdt.c

diff --git a/arch/powerpc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c
index 15a184b5c624cf27ae9c2a2be5e756b3298ace74..bd905d15863b99ca6c0e81f75bf2d5c69dee514b 100644 (file)
--- a/arch/powerpc/cpu/ppc4xx/fdt.c
+++ b/arch/powerpc/cpu/ppc4xx/fdt.c
@@ -2,34 +2,17 @@
  * (C) Copyright 2007-2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <watchdog.h>
 #include <command.h>
 #include <asm/cache.h>
-#include <ppc4xx.h>
+#include <asm/ppc4xx.h>
 
 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 #include <libfdt.h>
-#include <libfdt_env.h>
 #include <fdt_support.h>
 #include <asm/4xx_pcie.h>
 
@@ -59,14 +42,14 @@ void __ft_board_setup(void *blob, bd_t *bd)
                        *p++ = 0;
                        *p++ = bxcr & EBC_BXCR_BAS_MASK;
                        *p++ = EBC_BXCR_BANK_SIZE(bxcr);
+               }
+       }
+
 
 #ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
-                       /* Try to update reg property in nor flash node too */
-                       fdt_fixup_nor_flash_size(blob, i,
-                                                EBC_BXCR_BANK_SIZE(bxcr));
+       /* Update reg property in all nor flash nodes too */
+       fdt_fixup_nor_flash_size(blob);
 #endif
-               }
-       }
 
        /* Some 405 PPC's have EBC as direct PLB child in the dts */
        if (fdt_path_offset(blob, ebc_path) < 0)
@@ -141,7 +124,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
        /*
         * Fixup all UART clocks for CPU internal UARTs
-        * (only these UARTs are definitely clocked by gd->uart_clk)
+        * (only these UARTs are definitely clocked by gd->arch.uart_clk)
         *
         * These UARTs are direct childs of /plb/opb. This code
         * does not touch any UARTs that are connected to the ebc.
@@ -160,7 +143,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
                    (fdt_node_check_compatible(blob, off, "ns16550") == 0))
                        fdt_setprop(blob, off,
                                    "clock-frequency",
-                                   (void*)&(gd->uart_clk), 4);
+                                   (void *)&gd->arch.uart_clk, 4);
        }
 
        /*