powerpc/srio: Update the SRIO LIODN registers and ID table macro

[karo-tx-uboot.git] / arch / powerpc / include / asm / fsl_liodn.h

diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h
index a9973b80da5c0d1a2980a4f14e807da3782823f1..44bc88dcecd0ddd8cc20e1b8614888080050ce27 100644 (file)
--- a/arch/powerpc/include/asm/fsl_liodn.h
+++ b/arch/powerpc/include/asm/fsl_liodn.h
@@ -1,23 +1,7 @@
 /*
  * Copyright 2009-2011 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _FSL_LIODN_H_
@@ -45,6 +29,13 @@ struct srio_liodn_id_table {
                + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
        }
 
+#define SET_SRIO_LIODN_BASE(port, id_a) \
+       { .id = { id_a }, .num_ids = 1, .portid = port, \
+         .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
+               + (port - 1) * 0x200 \
+               + CONFIG_SYS_FSL_SRIO_ADDR, \
+       }
+
 struct liodn_id_table {
        const char * compat;
        u32 id[2];
@@ -94,6 +85,11 @@ extern void fdt_fixup_liodn(void *blob);
        SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
                CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
 
+#define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
+       SET_LIODN_ENTRY_1(compat, liodn,\
+               offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
+               CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
+
 /* reg nodes for DMA start @ 0x300 */
 #define SET_DMA_LIODN(dmaNum, liodn) \
        SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\
@@ -118,6 +114,12 @@ extern void fdt_fixup_liodn(void *blob);
                CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
                CONFIG_SYS_FSL_CORENET_PME_OFFSET)
 
+#define SET_PMAN_LIODN(num, liodn) \
+       SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \
+               offsetof(struct ccsr_pman, ppa1) + \
+               CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \
+               CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET)
+
 /* -1 from portID due to how immap has the registers */
 #define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
        CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
@@ -184,11 +186,13 @@ extern void fdt_fixup_liodn(void *blob);
 extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
 extern struct liodn_id_table raide_liodn_tbl[];
 extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
+#ifdef CONFIG_SYS_SRIO
 extern struct srio_liodn_id_table srio_liodn_tbl[];
+extern int srio_liodn_tbl_sz;
+#endif
 extern struct liodn_id_table rman_liodn_tbl[];
 extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
 extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
-extern int srio_liodn_tbl_sz;
 extern int rman_liodn_tbl_sz;
 
 #endif