Update from 2013.01 to 2013.07

[karo-tx-uboot.git] / arch / powerpc / include / asm / immap_512x.h

diff --git a/arch/powerpc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h
index f763a5413e3f2892e5982ce3e6513f704c03cdfb..01c9efff9779850e2e24a991aeeb29bbcadc6f23 100644 (file)
--- a/arch/powerpc/include/asm/immap_512x.h
+++ b/arch/powerpc/include/asm/immap_512x.h
@@ -3,20 +3,7 @@
  *
  * MPC512x Internal Memory Map
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  *
  * Based on the MPC83xx header.
  */
@@ -227,7 +214,9 @@ typedef struct clk512x {
 #define CLOCK_SCCR2_IIM_EN             0x00080000
 
 /* SCFR1 System Clock Frequency Register 1 */
+#ifndef SCFR1_IPS_DIV
 #define SCFR1_IPS_DIV          0x3
+#endif
 #define SCFR1_IPS_DIV_MASK     0x03800000
 #define SCFR1_IPS_DIV_SHIFT    23
 
@@ -238,6 +227,12 @@ typedef struct clk512x {
 #define SCFR1_LPC_DIV_MASK     0x00003800
 #define SCFR1_LPC_DIV_SHIFT    11
 
+#define SCFR1_NFC_DIV_MASK     0x00000700
+#define SCFR1_NFC_DIV_SHIFT    8
+
+#define SCFR1_DIU_DIV_MASK     0x000000FF
+#define SCFR1_DIU_DIV_SHIFT    0
+
 /* SCFR2 System Clock Frequency Register 2 */
 #define SCFR2_SYS_DIV          0xFC000000
 #define SCFR2_SYS_DIV_SHIFT    26
@@ -343,6 +338,7 @@ typedef struct ddr512x {
 
 /* MDDRC SYS CFG and Timing CFG0 Registers */
 #define MDDRC_SYS_CFG_EN       0xF0000000
+#define MDDRC_SYS_CFG_CKE_MASK 0x40000000
 #define MDDRC_SYS_CFG_CMD_MASK 0x10000000
 #define MDDRC_REFRESH_ZERO_MASK        0x0000FFFF
 
@@ -870,6 +866,19 @@ typedef struct iopin_t {
 
 void iopin_initialize(iopin_t *,int);
 
+/*
+ * support to adjust individual parts of the IO pin setup
+ */
+
+#define IO_PIN_OVER_EACH       (1 << 0) /* for compatibility */
+#define IO_PIN_OVER_FMUX       (1 << 1)
+#define IO_PIN_OVER_HOLD       (1 << 2)
+#define IO_PIN_OVER_PULL       (1 << 3)
+#define IO_PIN_OVER_STRIG      (1 << 4)
+#define IO_PIN_OVER_DRVSTR     (1 << 5)
+
+void iopin_initialize_bits(iopin_t *, int);
+
 /*
  * IIM
  */
@@ -1250,4 +1259,6 @@ static inline u32 get_pata_base (void)
 #define CONFIG_SYS_MPC512x_USB_ADDR \
                        (CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB_OFFSET)
 
+#define IIM_BASE_ADDR  (CONFIG_SYS_IMMR + offsetof(immap_t, iim))
+
 #endif /* __IMMAP_512x__ */