ppc4xx: Remove 4xx NAND booting support

[karo-tx-uboot.git] / board / amcc / acadia / pll.c

diff --git a/board/amcc/acadia/pll.c b/board/amcc/acadia/pll.c
index d74b725ae50dbefadb0df101185b539bf6cba476..d868582ba90d53bc4384e2d1f9bba2052ecfd133 100644 (file)
--- a/board/amcc/acadia/pll.c
+++ b/board/amcc/acadia/pll.c
@@ -135,45 +135,3 @@ void board_pll_init_f(void)
        mtcpr(CPR0_CLKUP, 0x40000000);
 }
 #endif                         /* CPU_<speed>_405EZ */
-
-#if defined(CONFIG_NAND_SPL) || defined(CONFIG_SPI_SPL)
-/*
- * Get timebase clock frequency
- */
-unsigned long get_tbclk(void)
-{
-       unsigned long cpr_plld;
-       unsigned long cpr_primad;
-       unsigned long primad_cpudv;
-       unsigned long pllFbkDiv;
-       unsigned long freqProcessor;
-
-       /*
-        * Read PLL Mode registers
-        */
-       mfcpr(CPR0_PLLD, cpr_plld);
-
-       /*
-        * Read CPR_PRIMAD register
-        */
-       mfcpr(CPR0_PRIMAD, cpr_primad);
-
-       /*
-        * Determine CPU clock frequency
-        */
-       primad_cpudv = ((cpr_primad & PRIMAD_CPUDV_MASK) >> 24);
-       if (primad_cpudv == 0)
-               primad_cpudv = 16;
-
-       /*
-        * Determine FBK_DIV.
-        */
-       pllFbkDiv = ((cpr_plld & PLLD_FBDV_MASK) >> 24);
-       if (pllFbkDiv == 0)
-               pllFbkDiv = 256;
-
-       freqProcessor = (CONFIG_SYS_CLK_FREQ * pllFbkDiv) / primad_cpudv;
-
-       return (freqProcessor);
-}
-#endif /* defined(CONFIG_NAND_SPL) || defined(CONFIG_SPI_SPL) */