]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - board/atmel/at91sam9rlek/at91sam9rlek.c
at91sam9/at91cap: move nand drivers to drivers/mtd/nand
[karo-tx-uboot.git] / board / atmel / at91sam9rlek / at91sam9rlek.c
index b6fef9d6f5f005f6ee4873b399f3675f5cc328ff..908b9c801ba3f8e9077fe7af4651220efd4f0ac0 100644 (file)
@@ -26,6 +26,7 @@
 #include <asm/arch/at91sam9rl.h>
 #include <asm/arch/at91sam9rl_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
@@ -43,33 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscelaneous platform dependent initialisations
  */
 
-static void at91sam9rlek_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-       at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
-       at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0);
-#endif
-
-#ifdef CONFIG_USART1
-       at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
-       at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1);
-#endif
-
-#ifdef CONFIG_USART2
-       at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
-       at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2);
-#endif
-
-#ifdef CONFIG_USART3   /* DBGU */
-       at91_set_A_periph(AT91_PIN_PA21, 0);            /* DRXD */
-       at91_set_A_periph(AT91_PIN_PA22, 1);            /* DTXD */
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-#endif
-}
-
 #ifdef CONFIG_CMD_NAND
 static void at91sam9rlek_nand_hw_init(void)
 {
@@ -102,30 +76,16 @@ static void at91sam9rlek_nand_hw_init(void)
        at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD);
 
        /* Configure RDY/BSY */
-       at91_set_gpio_input(AT91_PIN_PD17, 1);
+       at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
        /* Enable NandFlash */
-       at91_set_gpio_output(AT91_PIN_PB6, 1);
+       at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 
        at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
        at91_set_A_periph(AT91_PIN_PB5, 0);             /* NANDWE */
 }
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-static void at91sam9rlek_spi_hw_init(void)
-{
-       at91_set_A_periph(AT91_PIN_PA28, 0);    /* SPI0_NPCS0 */
-
-       at91_set_A_periph(AT91_PIN_PA25, 0);    /* SPI0_MISO */
-       at91_set_A_periph(AT91_PIN_PA26, 0);    /* SPI0_MOSI */
-       at91_set_A_periph(AT91_PIN_PA27, 0);    /* SPI0_SPCK */
-
-       /* Enable clock */
-       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
-}
-#endif
-
 #ifdef CONFIG_LCD
 vidinfo_t panel_info = {
        vl_col:         240,
@@ -223,12 +183,12 @@ int board_init(void)
        /* adress of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-       at91sam9rlek_serial_hw_init();
+       at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
        at91sam9rlek_nand_hw_init();
 #endif
 #ifdef CONFIG_HAS_DATAFLASH
-       at91sam9rlek_spi_hw_init();
+       at91_spi0_hw_init(1 << 0);
 #endif
 #ifdef CONFIG_LCD
        at91sam9rlek_lcd_hw_init();