Merge branch 'master' of git://git.denx.de/u-boot-usb

[karo-tx-uboot.git] / board / corscience / tricorder / tricorder.c

diff --git a/board/corscience/tricorder/tricorder.c b/board/corscience/tricorder/tricorder.c
index 435711a2ab4f563c1b3fab9efd1d827398c19393..5c02eaf2ecf287bfa1e1d39f8588d1799d92fbcc 100644 (file)
--- a/board/corscience/tricorder/tricorder.c
+++ b/board/corscience/tricorder/tricorder.c
@@ -80,7 +80,7 @@ void set_muxconf_regs(void)
 #if defined(CONFIG_GENERIC_MMC) && !(defined(CONFIG_SPL_BUILD))
 int board_mmc_init(bd_t *bis)
 {
-       return omap_mmc_init(0);
+       return omap_mmc_init(0, 0, 0, -1, -1);
 }
 #endif
 
@@ -91,15 +91,14 @@ int board_mmc_init(bd_t *bis)
  * provides the timing values back to the function that configures
  * the memory.  We have either one or two banks of 128MB DDR.
  */
-void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
-                               u32 *mr)
+void get_board_mem_timings(struct board_sdrc_timings *timings)
 {
        /* General SDRC config */
-       *mcfg = MICRON_V_MCFG_165(128 << 20);
-       *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+       timings->mcfg = MICRON_V_MCFG_165(128 << 20);
+       timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 
        /* AC timings */
-       *ctrla = MICRON_V_ACTIMA_165;
-       *ctrlb = MICRON_V_ACTIMB_165;
-       *mr = MICRON_V_MR_165;
+       timings->ctrla = MICRON_V_ACTIMA_165;
+       timings->ctrlb = MICRON_V_ACTIMB_165;
+       timings->mr = MICRON_V_MR_165;
 }