]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - board/davedenx/aria/aria.c
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
[karo-tx-uboot.git] / board / davedenx / aria / aria.c
index 31b079b1c38105d65a22ebb42df20d3fc576d6c8..229025735826fdbed2b69f8f265aab28210ca4e8 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* Clocks in use */
-#define SCCR1_CLOCKS_EN        (CLOCK_SCCR1_CFG_EN |                           \
-                        CLOCK_SCCR1_LPC_EN |                           \
-                        CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |       \
-                        CLOCK_SCCR1_PSCFIFO_EN |                       \
-                        CLOCK_SCCR1_DDR_EN |                           \
-                        CLOCK_SCCR1_FEC_EN |                           \
-                        CLOCK_SCCR1_NFC_EN |                           \
-                        CLOCK_SCCR1_PATA_EN |                          \
-                        CLOCK_SCCR1_PCI_EN |                           \
-                        CLOCK_SCCR1_TPR_EN)
-
-#define SCCR2_CLOCKS_EN        (CLOCK_SCCR2_MEM_EN |           \
-                        CLOCK_SCCR2_SPDIF_EN |         \
-                        CLOCK_SCCR2_DIU_EN |           \
-                        CLOCK_SCCR2_I2C_EN)
-
-int board_early_init_f(void)
-{
-       volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-       u32 spridr;
-
-       /*
-        * Initialize Local Window for the On Board FPGA access
-        */
-       out_be32(&im->sysconf.lpcs2aw,
-               CSAW_START(CONFIG_SYS_ARIA_FPGA_BASE) |
-               CSAW_STOP(CONFIG_SYS_ARIA_FPGA_BASE, CONFIG_SYS_ARIA_FPGA_SIZE)
-       );
-       out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
-       sync_law(&im->sysconf.lpcs2aw);
-
-       /*
-        * Initialize Local Window for the On Board SRAM access
-        */
-       out_be32(&im->sysconf.lpcs6aw,
-               CSAW_START(CONFIG_SYS_ARIA_SRAM_BASE) |
-               CSAW_STOP(CONFIG_SYS_ARIA_SRAM_BASE, CONFIG_SYS_ARIA_SRAM_SIZE)
-       );
-       out_be32(&im->lpc.cs_cfg[6], CONFIG_SYS_CS6_CFG);
-       sync_law(&im->sysconf.lpcs6aw);
-
-       /*
-        * Configure Flash Speed
-        */
-       out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
-
-       spridr = in_be32(&im->sysconf.spridr);
-
-       if (SVR_MJREV(spridr) >= 2)
-               out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
-
-       /*
-        * Enable clocks
-        */
-       out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
-       out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
-#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
-       setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
-#endif
-
-       return 0;
-}
-
 phys_size_t initdram (int board_type)
 {
        return fixed_sdram(NULL, NULL, 0);