#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/emac_defs.h>
+#include <asm/arch/pinmux_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
+#include <hwconfig.h>
DECLARE_GLOBAL_DATA_PTR;
-#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
+#ifdef CONFIG_DRIVER_TI_EMAC
+#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
+#define HAS_RMII 1
+#else
+#define HAS_RMII 0
+#endif
+#endif /* CONFIG_DRIVER_TI_EMAC */
-/* SPI0 pin muxer settings */
-static const struct pinmux_config spi1_pins[] = {
- { pinmux(5), 1, 1 },
- { pinmux(5), 1, 2 },
- { pinmux(5), 1, 4 },
- { pinmux(5), 1, 5 }
-};
+void dsp_lpsc_on(unsigned domain, unsigned int id)
+{
+ dv_reg_p mdstat, mdctl, ptstat, ptcmd;
+ struct davinci_psc_regs *psc_regs;
-/* UART pin muxer settings */
-static const struct pinmux_config uart_pins[] = {
- { pinmux(0), 4, 6 },
- { pinmux(0), 4, 7 },
- { pinmux(4), 2, 4 },
- { pinmux(4), 2, 5 }
-};
+ psc_regs = davinci_psc0_regs;
+ mdstat = &psc_regs->psc0.mdstat[id];
+ mdctl = &psc_regs->psc0.mdctl[id];
+ ptstat = &psc_regs->ptstat;
+ ptcmd = &psc_regs->ptcmd;
-#ifdef CONFIG_DRIVER_TI_EMAC
-static const struct pinmux_config emac_pins[] = {
-#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
- { pinmux(14), 8, 2 },
- { pinmux(14), 8, 3 },
- { pinmux(14), 8, 4 },
- { pinmux(14), 8, 5 },
- { pinmux(14), 8, 6 },
- { pinmux(14), 8, 7 },
- { pinmux(15), 8, 1 },
-#else /* ! CONFIG_DRIVER_TI_EMAC_USE_RMII */
- { pinmux(2), 8, 1 },
- { pinmux(2), 8, 2 },
- { pinmux(2), 8, 3 },
- { pinmux(2), 8, 4 },
- { pinmux(2), 8, 5 },
- { pinmux(2), 8, 6 },
- { pinmux(2), 8, 7 },
- { pinmux(3), 8, 0 },
- { pinmux(3), 8, 1 },
- { pinmux(3), 8, 2 },
- { pinmux(3), 8, 3 },
- { pinmux(3), 8, 4 },
- { pinmux(3), 8, 5 },
- { pinmux(3), 8, 6 },
- { pinmux(3), 8, 7 },
-#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
- { pinmux(4), 8, 0 },
- { pinmux(4), 8, 1 }
-};
+ while (*ptstat & (0x1 << domain))
+ ;
-/* I2C pin muxer settings */
-static const struct pinmux_config i2c_pins[] = {
- { pinmux(4), 2, 2 },
- { pinmux(4), 2, 3 }
-};
+ if ((*mdstat & 0x1f) == 0x03)
+ return; /* Already on and enabled */
-#ifdef CONFIG_NAND_DAVINCI
-const struct pinmux_config nand_pins[] = {
- { pinmux(7), 1, 1 },
- { pinmux(7), 1, 2 },
- { pinmux(7), 1, 4 },
- { pinmux(7), 1, 5 },
- { pinmux(9), 1, 0 },
- { pinmux(9), 1, 1 },
- { pinmux(9), 1, 2 },
- { pinmux(9), 1, 3 },
- { pinmux(9), 1, 4 },
- { pinmux(9), 1, 5 },
- { pinmux(9), 1, 6 },
- { pinmux(9), 1, 7 },
- { pinmux(12), 1, 5 },
- { pinmux(12), 1, 6 }
-};
+ *mdctl |= 0x03;
+
+ *ptcmd = 0x1 << domain;
+
+ while (*ptstat & (0x1 << domain))
+ ;
+ while ((*mdstat & 0x1f) != 0x03)
+ ; /* Probably an overkill... */
+}
+
+static void dspwake(void)
+{
+ unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
+ u32 val;
+
+ /* if the device is ARM only, return */
+ if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
+ return;
+
+ if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
+ return;
+
+ *resetvect++ = 0x1E000; /* DSP Idle */
+ /* clear out the next 10 words as NOP */
+ memset(resetvect, 0, sizeof(unsigned) *10);
+
+ /* setup the DSP reset vector */
+ writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
+
+ dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
+ val = readl(PSC0_MDCTL + (15 * 4));
+ val |= 0x100;
+ writel(val, (PSC0_MDCTL + (15 * 4)));
+}
+
+int misc_init_r(void)
+{
+ dspwake();
+ return 0;
+}
+
+static const struct pinmux_config gpio_pins[] = {
+#ifdef CONFIG_USE_NOR
+ /* GP0[11] is required for NOR to work on Rev 3 EVMs */
+ { pinmux(0), 8, 4 }, /* GP0[11] */
#endif
+};
+static const struct pinmux_resource pinmuxes[] = {
+#ifdef CONFIG_DRIVER_TI_EMAC
+ PINMUX_ITEM(emac_pins_mdio),
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
-#define HAS_RMII 1
+ PINMUX_ITEM(emac_pins_rmii),
#else
-#define HAS_RMII 0
+ PINMUX_ITEM(emac_pins_mii),
+#endif
#endif
-#endif /* CONFIG_DRIVER_TI_EMAC */
-
-static const struct pinmux_resource pinmuxes[] = {
#ifdef CONFIG_SPI_FLASH
- PINMUX_ITEM(spi1_pins),
+ PINMUX_ITEM(spi1_pins_base),
+ PINMUX_ITEM(spi1_pins_scs0),
#endif
- PINMUX_ITEM(uart_pins),
- PINMUX_ITEM(i2c_pins),
+ PINMUX_ITEM(uart2_pins_txrx),
+ PINMUX_ITEM(uart2_pins_rtscts),
+ PINMUX_ITEM(i2c0_pins),
#ifdef CONFIG_NAND_DAVINCI
- PINMUX_ITEM(nand_pins),
+ PINMUX_ITEM(emifa_pins_cs3),
+ PINMUX_ITEM(emifa_pins_cs4),
+ PINMUX_ITEM(emifa_pins_nand),
+#elif defined(CONFIG_USE_NOR)
+ PINMUX_ITEM(emifa_pins_cs2),
+ PINMUX_ITEM(emifa_pins_nor),
#endif
+ PINMUX_ITEM(gpio_pins),
};
static const struct lpsc_resource lpsc[] = {
#define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
#endif
+#define REV_AM18X_EVM 0x100
+
/*
* get_board_rev() - setup to pass kernel board revision information
* Returns:
rev = 2;
else if (maxcpuclk >= 372000000)
rev = 1;
-
+#ifdef CONFIG_DA850_AM18X_EVM
+ rev |= REV_AM18X_EVM;
+#endif
return rev;
}
+int board_early_init_f(void)
+{
+ /*
+ * Power on required peripherals
+ * ARM does not have access by default to PSC0 and PSC1
+ * assuming here that the DSP bootloader has set the IOPU
+ * such that PSC access is available to ARM
+ */
+ if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
+ return 1;
+
+ return 0;
+}
+
int board_init(void)
{
+#ifdef CONFIG_USE_NOR
+ u32 val;
+#endif
+
#ifndef CONFIG_USE_IRQ
irq_init();
#endif
-
#ifdef CONFIG_NAND_DAVINCI
/*
* NAND CS setup - cycle counts based on da850evm NAND timings in the
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /*
- * Power on required peripherals
- * ARM does not have access by default to PSC0 and PSC1
- * assuming here that the DSP bootloader has set the IOPU
- * such that PSC access is available to ARM
- */
- if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
- return 1;
-
/* setup the SUSPSRC for ARM to control emulation suspend */
writel(readl(&davinci_syscfg_regs->suspsrc) &
~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
return 1;
-#ifdef CONFIG_DRIVER_TI_EMAC
- if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
- return 1;
+#ifdef CONFIG_USE_NOR
+ /* Set the GPIO direction as output */
+ clrbits_be32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
+
+ /* Set the output as low */
+ val = readl(GPIO_BANK0_REG_SET_ADDR);
+ val |= (0x01 << 11);
+ writel(val, GPIO_BANK0_REG_CLR_ADDR);
+#endif
+#ifdef CONFIG_DRIVER_TI_EMAC
davinci_emac_mii_mode_sel(HAS_RMII);
#endif /* CONFIG_DRIVER_TI_EMAC */
projects / karo-tx-uboot.git / blobdiff